I'm working on a project using the i.MX8ULP processor, and I’m trying to reduce the A-core (Cortex-A35) clock frequency to around 40–50 MHz in order to lower the overall power consumption.
Currently, I’m using the following steps to switch the A-core clock source and adjust PLL settings:
# Switch A35 to FRO 192 MHz
/unit_tests/memtool -32 0x292c0014=0x08000000
# Disable PLL2
/unit_tests/memtool -32 0x292c0500=0x03000000
# Read division and multiplication factors
/unit_tests/memtool -32 0x292c0014 1
/unit_tests/memtool -32 0x292c0510 1
# Enable PLL2
/unit_tests/memtool -32 0x292c0500=0x03000001
# Switch A35 back to PLL2
/unit_tests/memtool -32 0x292c0014=0x18000000
However, I need to bring it down to the 40–50 MHz range for this how can i able to achieve this?
Is it possible to run the A35 core at 40–50 MHz on the i.MX8ULP?
If so, how should the clock source and dividers be configured to achieve this?
