How to Configure and Verify ECC on i.MX8MP Platform

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How to Configure and Verify ECC on i.MX8MP Platform

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DADAXIN
Contributor II

Hello NXP Community,

I'm currently working on enabling LPDDR4 ECC on the i.MX8MP platform, and I have some questions regarding both U-Boot and Linux kernel configurations.

Here's what I've done so far:

  • I used NXP's DDR Tool to generate timing and ECC-related settings.

  • I integrated the generated lpddr4_timing.c into U-Boot and confirmed ECC support is enabled during build.

  • I enabled the necessary ECC configuration options in the device tree (DTS).

However, I’m unclear about the proper method to verify ECC is working correctly, especially:

  1. In U-Boot:

    • Is there a built-in command or test method to check ECC (e.g., similar to ecc command available on i.MX93)?

    • How can I confirm that ECC initialization and scrub happened correctly?

  2. In Kernel:

    • Besides enabling ECC support in DTS, is there a test module or log I can check for ECC errors or corrections?

    • Do I need to enable additional kernel modules (e.g., EDAC or ramoops)?

If available, could you please share the ECC test binary file or any guidance specific to i.MX8MP for ECC validation?

Thank you in advance for your support.

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pengyong_zhang
NXP Employee
NXP Employee

Hi @DADAXIN 

A1 : No need to change the dts file about ecc region.

A2: How do you enable the ecc feature? You need to run the make imx8mp_evk_inline_ecc_defconfig to compile the uboot and then compile the flash.bin file.

B.R

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pengyong_zhang
NXP Employee
NXP Employee

Hi @DADAXIN 

A1 : No need to change the dts file about ecc region.

A2: How do you enable the ecc feature? You need to run the make imx8mp_evk_inline_ecc_defconfig to compile the uboot and then compile the flash.bin file.

B.R

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pengyong_zhang
NXP Employee
NXP Employee

Hi @DADAXIN 

Please refer the attachment file for ECC on imx8 Series. there is no validation tool to test it, enable is enable. We have verified it , and it can works fine. And if you do need the test binary, you need to check the attachment file and write the test code by yourself.

B.R 

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DADAXIN
Contributor II
Hello, thank you for your response.

Based on the document you provided, I have two questions regarding the device tree (DTS) configuration for ECC in U-Boot:

1. About the reserved ECC memory region in U-Boot DTS:

My board has 4GB of DDR, and according to the 1/8 ECC reservation ratio, I understand that 512MB should be reserved for ECC.

Could you please confirm how to correctly define the ecc_reserved node in U-Boot’s DTS? For example:

ecc_reserved: ecc@b8000000 {
no-map;
reg = <0 0xb8000000 0 0x20000000>;
};

In addition, do I also need to reduce the size defined in memory@80000000 by 512MB to prevent the system from using the ECC reserved area?

Please let me know if this configuration is correct, and whether similar changes are also required in the Linux kernel DTS.

2. ECC not enabled in Linux:

After booting into the system, I checked the kernel logs with dmesg | grep -i ecc and saw:

[ 1.807708] EDAC MC: ECC not enabled

Does this indicate that ECC is actually not enabled in the system?

Looking forward to your further guidance. Thank you very much!
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