How to Configure UART in IMX7D

[chandiniindavar]

Hi All

I am just trying Print Hello_world with IMX7D through UART other than UART DEBUG Ports..

..

Trying to configure UART5.

connecting TX, RX<GND in J33 but not getting anything in terminal ..

If UART5 is default enable or do i need to configure..?

In code just i changed below line [board.h]

/* Debug UART information for this board */

#define BOARD_DEBUG_UART_RDC_PDAP             rdcPdapUart5

#define BOARD_DEBUG_UART_CCM_ROOT             ccmRootUart5

#define BOARD_DEBUG_UART_CCM_CCGR             ccmCcgrGateUart5

#define BOARD_DEBUG_UART_BASEADDR             UART5

#define BOARD_DEBUG_UART_IRQ_NUM              UART5_IRQn

#define BOARD_DEBUG_UART_HANDLER              UART5_Handler

FREERTOS original example ,schematic and data sheet attached  ..

Please any one please me

Thanks in advance

Chandini

Original Attachment has been moved to: uart_imx.zip

Original Attachment has been moved to: board.h.zip

[chandiniindavar]

Yes it works perfectly fine , it was hardware issue in my case .As soon as i replace the board . it was started working

Please let me know , still if your facing same issue

BR

Chandini

[igorpadykov]

Hi chandini

programming interface of the UART driver is given in platform/drivers/inc/uart_imx.h.

To initialize the UART module, define an uart_init_config_t type variable and pass it to the UART_Init()

function. Here is the Members of the structure definition:

1. clockRate: Current UART module clock frequency. This variable can be obtained by calling get_-

uart_clock_freq() function;

2. baudRate: Desired UART baud rate. If the desired baud rate exceed UART module’s limitation, the

most nearest legal value is chosen;

3. wordLength: Data bits in one frame;

4. stopBitNum: Number of stop bits in one frame;

5. parity: Parity error check mode of this module;

6. direction: Data transfer direction of this module. this field is used to select the transfer direction.

Choose the direction you used only can save system’ s power.

User should also call UART_SetTxFifoWatermark() and UART_SetRxFifoWatermark() to set the watermark

of TX/RX FIFO. After that, user can call UART_Enable() to enable UART module and transfer data

through UART port.

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

[chandiniindavar]

Igor,

I already Followed all the steps by seeing how UART2 is enabled  and edited 4 files TO USE UART5 instead of UART2[debug] But i cant see any things in terminal.

To cross check my procedure i configure to UART1[debug] instead of UART2[debug] .i can messages coming out from terminal from UART1 ..

IN case of UART5 its not working igor

Files are attached .

Chandini

[igorpadykov]

suggest to attach jtag debugger and check registers.

~igor

[chandiniindavar]

Igor

How to open ttymxc4 ?

i can see ttymxc4 and ttymxc5 after boot kernel .

If there any way to open that port ?

Thanks

Chandini

[igorpadykov]

Chandini

i.MX7 is not officially released yet and not supported in usual way as other processors.

Suggest to contact local fae and ask special support channel, used for preproduction

chips.

~igor

[chandiniindavar]

Thanks for your replay .. i am trying for special support .

[edcoyne]

Just curious if you ever figured out your problem as I am encountering a similar issue, need to move the debug uart to uart6 and seeing no output.

[chandiniindavar]

Igor ,

I am not using Jtag debugger, I am just using ARM GCC to build [FREERTOS] and copy .bin to SDCARD and  load from that using below commands.

fatload mmc 0:1 0x7F8000  uart_imx_interrupt_example5.bin

dcache flush

bootaux 0x7F8000 .

Is there any other way to cross check ?

Even i have added below code to pin_mux.c

void configure_uart_pins(UART_Type* base)

{

    switch((uint32_t)base)

    {

        case UART2_BASE:

            // UART2 iomux configuration

            IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA_MUX_MODE(0);

            IOMUXC_SW_MUX_CTL_PAD_UART2_TX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART2_TX_DATA_MUX_MODE(0);

            IOMUXC_SW_PAD_CTL_PAD_UART2_RX_DATA = IOMUXC_SW_PAD_CTL_PAD_UART2_RX_DATA_PE_MASK  |

                                                  IOMUXC_SW_PAD_CTL_PAD_UART2_RX_DATA_PS(3)    |

                                                  IOMUXC_SW_PAD_CTL_PAD_UART2_RX_DATA_HYS_MASK |

                                                  IOMUXC_SW_PAD_CTL_PAD_UART2_RX_DATA_DSE(0);

            IOMUXC_SW_PAD_CTL_PAD_UART2_TX_DATA = IOMUXC_SW_PAD_CTL_PAD_UART2_TX_DATA_PE_MASK  |

                                                  IOMUXC_SW_PAD_CTL_PAD_UART2_TX_DATA_PS(3)    |

                                                  IOMUXC_SW_PAD_CTL_PAD_UART2_RX_DATA_HYS_MASK |

                                                  IOMUXC_SW_PAD_CTL_PAD_UART2_TX_DATA_DSE(0);

            IOMUXC_UART2_RX_DATA_SELECT_INPUT = IOMUXC_UART2_RX_DATA_SELECT_INPUT_DAISY(2);

            break;

  case UART5_BASE:

  IOMUXC_SW_MUX_CTL_PAD_UART5_RX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART5_RX_DATA_MUX_MODE(0);

            IOMUXC_SW_MUX_CTL_PAD_UART5_TX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART5_TX_DATA_MUX_MODE(0);

            IOMUXC_SW_PAD_CTL_PAD_UART5_RX_DATA = IOMUXC_SW_PAD_CTL_PAD_UART5_RX_DATA_PE_MASK  |

                                                  IOMUXC_SW_PAD_CTL_PAD_UART5_RX_DATA_PS(3)    |

                                                  IOMUXC_SW_PAD_CTL_PAD_UART5_RX_DATA_HYS_MASK |

                                                  IOMUXC_SW_PAD_CTL_PAD_UART5_RX_DATA_DSE(0);

            IOMUXC_SW_PAD_CTL_PAD_UART5_TX_DATA = IOMUXC_SW_PAD_CTL_PAD_UART5_TX_DATA_PE_MASK  |

                                                  IOMUXC_SW_PAD_CTL_PAD_UART5_TX_DATA_PS(3)    |

                                                  IOMUXC_SW_PAD_CTL_PAD_UART5_RX_DATA_HYS_MASK |

                                                  IOMUXC_SW_PAD_CTL_PAD_UART5_TX_DATA_DSE(0);

            IOMUXC_UART5_RX_DATA_SELECT_INPUT = IOMUXC_UART5_RX_DATA_SELECT_INPUT_DAISY(5);

  IOMUXC_UART5_RTS_B_SELECT_INPUT = IOMUXC_UART5_RTS_B_SELECT_INPUT_DAISY(5);

            break;

        default:

            break;

    }

}

Thanks

Chandini

[chandiniindavar]

Also tried to replace with below line as well .          [in pin_muc.c ]

void configure_uart_pins(UART_Type* base)

{

case UART5_BASE:

IOMUXC_SW_MUX_CTL_PAD_UART5_RX_DATA = IOMUXC_SW_MUX_CTL_PAD_SAI1_RX_DATA_MUX_MODE(0);

            IOMUXC_SW_MUX_CTL_PAD_UART5_TX_DATA = IOMUXC_SW_MUX_CTL_PAD_SAI1_TX_DATA_MUX_MODE(0);

            IOMUXC_SW_PAD_CTL_PAD_UART5_RX_DATA = IOMUXC_SW_PAD_CTL_PAD_SAI1_RX_DATA_PE_MASK  |

                                                                                                   IOMUXC_SW_PAD_CTL_PAD_SAI1_RX_DATA_PS(3)    |

                                                                                                   IOMUXC_SW_PAD_CTL_PAD_SAI1_RX_DATA_HYS_MASK |

                                                                                                    IOMUXC_SW_PAD_CTL_PAD_SAI1_RX_DATA_DSE(0);

            IOMUXC_SW_PAD_CTL_PAD_UART5_TX_DATA = IOMUXC_SW_PAD_CTL_PAD_SAI1_TX_DATA_PE_MASK  |

                                                                                                  IOMUXC_SW_PAD_CTL_PAD_SAI1_TX_DATA_PS(3)    |

                                                                                                  IOMUXC_SW_PAD_CTL_PAD_SAI1_RX_DATA_HYS_MASK |

                                                                                                  IOMUXC_SW_PAD_CTL_PAD_SAI1_TX_DATA_DSE(0); 

            IOMUXC_UART5_RX_DATA_SELECT_INPUT = IOMUXC_UART5_RX_DATA_SELECT_INPUT_DAISY(5);

  IOMUXC_UART5_RTS_B_SELECT_INPUT = IOMUXC_UART5_RTS_B_SELECT_INPUT_DAISY(5);

}