How mutiple cores of IMX6 quad core processor serve the perihperal interrupts

[adityanagal]

Hi ,

IMX6 quad core processor supports the multiple cores. How these cores are interfaced with the GIC and when any interrupt occurs , which core will serve the interrupt , how it is decided. Please suggest.

Regards,

Aditya Nagal

[Yuri]

Hello,

   Usually it is recommended to use Irqbalance utility, which is especially useful on
systems with multi-core processors, as interrupts will typically only be serviced
by the first core.

Regards,

Yuri.

[Carlos_Musich]

Hello Aditya,

in Linux only core0 handles interrupts. And the GIC is a module provided inside ARM processor so you may refer to ARM for the documentation.

ARM Information Center 

Regards,
Carlos

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