How long does user need to wait after change the POST_PODF?

[ko-hey]

Hi all

I'm changing the DDR frequency dynamically in i.MX7D.

In particular, I'm changing MUX, PRE_PODF, POST_PODF of CCM_TARGET_ROOT 49, CCM_TARGET_ROOT 65.

After changing MUX, PRE_PODF, POST_PODF, please tell me how much to wait until the frequency is stably supplied to the peripheral.

If there are not any specific information, please tell me how to know the clock is stable or not.

Ko-hey

[igorpadykov · Accepted solution]

Hi Ko-hey

please use post divider BUSY1 flag described in sect.5.2.8.18 Post Divider Register (CCM_POSTn)

and further on text of i.MX7D Reference Manual

http://cache.nxp.com/files/32bit/doc/ref_manual/IMX7DRM.pdf

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[ko-hey]

Hi igorpadykov‌

With CCM_TARGET_ROOTn, when changing the DDR supply frequency (change MUX, PRE_PODF, POST_PODF of CCM_TARGET_ROOT), should I check the BUSY bit with CCM_POSTn ?

In that case, should I confirm the same number ?
For example, when changing with CCM_TARGET_ROOT 49, should I wait with the BUSY bit of CCM_POST 49 ?

Ko-hey

[igorpadykov]

Hi Ko-hey

yes it is necessary to check the BUSY bit

Best regards
igor

[ko-hey]

Thanks !

Ko-hey