How do complete the I.MX RT1176 dual-core self-start in NAND flash?

[liuhailong]

hello thanks @jingpan I think you are very familiar with this direction, so I look forward to hearing from you. 

How to move CM4 core project to SDRAM in RT1176 - NXP Community

I saw this post from you, just in time I'm working on the project and SDRAM. Let me describe to you the requirements of the project I'm working on: IMX first.RT1175/6 (nand flash) bootrom (nand flash) bootrom (nand flash) CM7 core program (image) copy to SDRAM running, cm7 image contains cm4 core image (cm7 boot cm4 core boot my own implementation), cm4 program need to copy to SRAM to execute, first there are several problems.My own project procedures are reflected in the attachment
1.How to configure the configuration in the MCU Setting of cm4 program, I should copy the image of cm4 to the （ITCM DTCM  OCRAM） DTCM  OCRAM which one？ 
2.How should I configure the configuration in the MCU Setting of the cm7 program?How SDRAM and other spaces should be configured

3.since SDRAM is used, SDRAM needs to be initialized. You mentioned in the article that configuration is via dcd. Could you introduce the specific configuration methods and procedures?RT1170_connect_M7_wake_M4_SDRAM_init.7z.

This document is only the result of initializing SDRAM, not how to initialize SDRAM

4.I just used MCU Bootability to load the dcd.bin file did sdram initialization, but also did I use the development board corresponding to NAND flash basic configuration, but the last phenomenon did not implement, how to complete the self-start on NAND through this software?

[jingpan]

Hi @liuhailong ,

1.How to configure the configuration in the MCU Setting of cm4 program, I should copy the image of cm4 to the （ITCM DTCM  OCRAM） DTCM  OCRAM which one？ 

You can only use OCRAM. You can't access M7 ITCM and DTCM.

2.How should I configure the configuration in the MCU Setting of the cm7 program?How SDRAM and other spaces should be configured

Similar to my example. SDRAM is configured by DCD file.

3.since SDRAM is used, SDRAM needs to be initialized. You mentioned in the article that configuration is via dcd. Could you introduce the specific configuration methods and procedures?

First you should know what DCD is. Please read 10.7.2 in reference manual. DCD file is not compiled into image. It is append at image head. So, you can append in project, like board/dcd.c, or append by tools like MCUBootUtility.

4. I just used MCU Bootability to load the dcd.bin file did sdram initialization, but also did I use the development board corresponding to NAND flash basic configuration, but the last phenomenon did not implement, how to complete the self-start on NAND through this software?

Please read this article. https://www.cnblogs.com/henjay724/p/17589695.html

Regards,

Jing

[liuhailong]

I have exported the dcd. c file from the cm7 project to dcd. bin through MCU XPRESSO, and also used MCU Bootility to bind the IVT FCB header. However, the final experimental phenomenon was not successful, so I suspect it is a configuration issue with MCU Setting. The cm7 program runs on SDRAM and the CM4 program runs on OCRAM. Is there any problem with my configuration in the figure? I think it's okay?

[jingpan]

Hi @liuhailong,

Your project plans to boot from a serial NAND flash, then config the SDRAM and copy the code to there. So the problem may caused in three step. 1. Is NAND flash boot up correctly? 2. Is DCD correct and in right position? 3. Is The M7/M4 project setting correct?

I think you can verify these step seperately.

Regards,

Jing

[liuhailong]

I know it's a few steps, 1 and 2 I think my configuration is okay, I guess it's probably the third step, so I asked you how to configure the MCU Setting for M7/M4 because I'm not sure.

[jingpan]

Hi @liuhailong ,

In CM4 project, you set the OCRAM address 0x20200000. This is the remapping address of CM4 TCM. You should use 0x1ffe000 as code address and 0x20000000 as data address. When CM7 write CM4 image, you should use 0x20200000.

Regards,

Jing

[liuhailong]

Can you provide the address configuration of different memory regions for MCU XPRESSO MCU Setting when CM7 program runs on SDRAM and CM4 program executes on SRAM? like this @jingpan

[jingpan]

Hi @liuhailong ,

You needn't change anything, keep CM4 project setting as default.

Regards,

Jing

[liuhailong]

The core issue I am currently facing is how to configure the cm7 program for MCU Setting in SDRAM , because it has not been successful in MCU XPRESSO. I know the configure content of CM4 program in SRAM,I am confused about the configuration of memory addresses for CM7 programs running in SDRAM and do not quite understand it @jingpan

[jingpan]

Hi @liuhailong ,

Sorry I'm still not clear about the situation on your side. Maybe you should refer to this one.

https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/I-MX-RT-How-to-boot-to-SDRAM/ta-p/1125054

Regards,

Jing

[liuhailong]

Please allow me to describe the scenario for you: the software is MCU XPRESSO 11.8. The process is as follows: After RT1175 starts, cm7 images (including cm4images) are stored in the Serial NAND, and then the CM7 images are moved to SDRAM. After the CM7 images run, the CM4 images are loaded into SRAM (DTCM OCRAM ITCM) for operation. Complete the CM7 core boot CM4 startup by following the above steps @jingpan 

[jingpan]

Hi @liuhailong ,

Yes, you should read this post.

https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/I-MX-RT-How-to-boot-to-SDRAM/ta-p/1125054

Regards,

Jing

[liuhailong]

First of all, thank you very much for your reply. I adopted the method described in the article and encountered the same problem as this person. I also used RT1176. How can I solve this problem? @jingpan 

[jingpan]

Hi @liuhailong ,

There is a better guide for your.

https://www.cnblogs.com/henjay724/p/12591382.html

As NAND device shares some same SEMC signals with SDRAM device (but with different CS), so it is not easy to use them in some case (for example, copying page data from NAND to SDRAM directly via AHB bus), but below case is ok:

NAND stores user application, after bootup, BootROM copies application from NAND to TCM, then application executes in TCM and configures SEMC to use SDRAM.

So, I think you should first copy a bootloader to TCM, then the bootloader copy application from NAND to OCRAM, and OCRAM to SDRAM.

What your ld file looks like?

Regards,

Jing

[liuhailong]

Sorry for what you said：What do you mean by TCM? which one？

[jingpan]

Hi @liuhailong ,

ITCM or DTCM, both fine.

Regards,

jing

[liuhailong]

1. First of all, after reading your suggestion, I currently have two confusions. I have configured SDRAM according to the method in this tutorial. After configuring CM7 core MCU Setting as shown in the figure, I found an error when compiling using your code configuration method. Therefore, I did not do this step in this section. My link script can refer to the attachment:

2.So, I think you should first copy a bootloader to TCM, then the bootloader copy application from NAND to OCRAM, and OCRAM to SDRAM.

Your statement: Although SDRAM and NAND share a portion of the CS pins, I have a question why it is not possible to directly copy the application program from NAND to SDRAM (because my colleague did this in Keil and successfully achieved the final result). Instead, we first copy the application program to OCRAM, and then copy it from OCRAM to SDRAM,

3.Can I use the default dcd. c file from the official routine to configure SEMC pin register values for SDRAM dcd file initialization?

[jingpan]

Hi @liuhailong ,

Base on the SEMC IP datasheet, it can support copy data from NAND flash to SDRAM. But I'm not sure how ROM do it. You'd better test it carefully.

Yes, you can use DCD to config sdram.

Regards,

Jing