How do I overcome UART FIFO Overruns

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How do I overcome UART FIFO Overruns

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ramanareddy
Contributor I

Hello,

I am posting this because I couldn't figure out from the existing solutions.

I have imx6dl based custom board with GPS antenna connected to UART2.

Once in a while I see the error 'imx-uart 21e8000.serial: Rx FIFO overrun'.

The same issue is posted here: iMX6Quad uart RX Fifo Overrun  and also in many threads.

The answers I got are like to implement hardware flow control OR increase the CPU frequency to maximum.

If I implement the hardware flow control, as per a thread here UART errors: "Rx FIFO overrun" and "overwrite!" 

when the RX FIFO is full already I wont be receiving the data. (Is this correct? If so I will lose GPS data).

I also increased the CPU Frequency to Maximum:

root@US16SIQC:~# cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq
792000

root@US16SIQC:~# cat /sys/devices/system/cpu/cpu1/cpufreq/cpuinfo_cur_freq
792000

root@US16SIQC:~# cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor
performance

But I still see the problem.

One more observation is that CPU0 is only loaded and CPU1 seems to be free:

root@US16SIQC:~# cat /proc/interrupts
                               CPU0                              CPU1
29:                          295735                            95769        GIC     29      twd
34:                          0                                      0                GIC     34     sdma
51:                          0                                      0                GIC     51     rtc alarm
54:                          89359                              0                GIC     54     mmc0
55:                          1438                                0                GIC     55     mmc1
56:                          11376                              0                GIC     56     mmc2
57:                          94462                              0                GIC     57     mmc3

59:                          156342579                      0                GIC     59     21e8000.serial
61:                          8530                                0                GIC     61     21f0000.serial
64:                          0                                      0                GIC     64     200c000.ecspi
65:                          0                                      0                GIC     65     2010000.ecspi
69:                          83                                    0                GIC     69     21a4000.i2c
70:                          100                                  0                GIC     70     21a8000.i2c
72:                          68                                    0                GIC     72     2184200.usb
75:                          0                                      0                GIC     75     2184000.usb
79:                          0                                      0                GIC     79     202c000.ssi
81:                          0                                      0                GIC     81     imx_thermal
87:                          0                                      0                GIC     87     i.MX Timer Tick
150:                        79751                              0                GIC    150    2188000.ethernet
151:                        0                                      0                GIC    151    2188000.ethernet
256:                        0                                      0                gpio-mxc 0   2194000.usdhc cd
IPI0:                        0                                      0               CPU wakeup interrupts
IPI1:                        0                                      0               Timer broadcast interrupts
IPI2:                        83871                              193191     Rescheduling interrupts
IPI3:                        0                                      0               Function call interrupts
IPI4:                        6502                                5527         Single function call interrupts
IPI5:                        0                                      0               CPU stop interrupts
IPI6:                        0                                      0               IRQ work interrupts
IPI7:                        0                                      0               completion interrupts
Err:                          0

Here, CPU1 is not being used much. Can I dedicate this CPU to only work on the UART2? Is this possible? How Can I balance the load between CPUs? If I can achieve this is there a possibility to fix the issue?

I am using linux kernel: 3.18.29 with openWRT Chaos Calmer.

Thanks,

Ramana

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Ramana

to dedicate some CPU to module interrupt one can look at irq affinity  discussion

https://community.freescale.com/thread/301130

Best regards
igor
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ramanareddy
Contributor I

Hi Igor,

I have increased the frequency and also tied the interrupt to CPU1. Now the FIFO overrun print is seen very rarely. What would be your suggestion to aviod this completely? Also what is the best way to reproduce this error?

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Ramana

one can try to place uart codes to ocram

Best regards
igor

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