Has anyone successfully interfaced to a Xilinx Kintex FPGA from a i.mx7 processor over PCIE

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Has anyone successfully interfaced to a Xilinx Kintex FPGA from a i.mx7 processor over PCIE

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rthornblad
Contributor II

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Summary

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we are having problems interfacing a i.mx7 SOM module to a Xilinx Kintex 7 FPGA over PCIE.

we were successful in designing a test board using a Xilinx Spartan 6 FPGA.

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Background

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2 boards have been designed.  A test board and a new product design.

a adapter board has also been produced that allows both the test and new product boards to be connected to a PC running linux in lieu of the i.mx7

i.mx7 is running linux which we downloaded from the compulab support site (not yocto).  We have tried both the image from the website and one we have built from source and both act the same.

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Test board

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   a)   i.mx7 processor    sourced from Compulab and is combination of a Base Board with i.mx7 SOM Module installed. 

   b)   PCIE                      done over mini-pcie connector located on base board..

   c)   FPGA                      Xilinx Spartan 6

   d)   imx7            WORKS OK   (driver / app software all work ok)  lspci shows correct data

   e)   PC              WORKS OK      (driver / app software all work ok) lspci shows correct data

   f)   Debug R0   current state is 11

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New Product design

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   a)   I.mx7 processor    combination of a Compulab SOM Module installed into our new product design Base Board.

   b)   PCIE                      done over direct connections on the PCB

   c)   FPGA                      Xilinx Kintex 7

   d)   i.mx7            WONT LINK   (PCIE Never links) lspci shows nothing as it never linked.

   e)   PC               WORKS OK.   (driver / app software all work ok) lspci shows correct data

   f)   Debug R0   current state is 2

We have been working the problem with Xilinx for some time now with little progress so far.  We have just started working with a new person there and hope to move forward.  However, I'm turning to the NXP community here to see if any of you can help.

I can provide lots of details as to what we have done (which will go on forever) but I'm not sure what would be most helpful.

In short:

   1.   The Xilinx LTSSM goes through many of the states.  In state 4 where its looking for data back from the i.mx7 it fails.  It then proceeds to retry but never succeeds and eventually the i.mx7 driver gives up and flags an error -110 (I believe this is ETIMEOUT).

   2.   We see traffic on both the TX and RX connections.between the 2 devices.  It appears detect etc are all working normally and since the design links when running against many different PC's running linux we believe that electrically the design is sound.

3.   I have monitored the 2 i.mx7 PCIE debug registers used by the driver and nothing obvious stood out.  It may be that I need to look at capturing the registers more often or perhaps there is a better way to debug this issue.

Now the big questions. 

1.   Have any of you had similar issues?

2.   Are there additional registers I can access in the i.mx7 PCIE phy that provide more detail about it's state.  Things like has the i.mx7 recieved any data, I'm waiting for something from the EP etc).

3.   Are there any detailed debug guides we can use to chase this down?  We have found some info on the web but none of those suggestions resolved the issue.

Any help or suggestions would be greatly appreciated.

I'm attaching a file with content from the 2 debug registers.  1 from the working test board and one from the new design.  Let me know what else might help and I will get you anything I can.

Thanks

-Roger

PS    We have already scoured the forums and google.  Found many things some of which helped with some initial design flaws in the new board design which helped us get to the point where it works with PC's and not with i.mx7.

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rthornblad
Contributor II

Hello all,

Sorry to report things are not working. with imx7.  Only when connected to PC's do we see correct operations of our board.

Xilinx has done a bunch of troubleshooting with us and believe they are working ok.  Have requested more info from i.mx7 to continue debugging the issue.

Igor is there someone you can put me in touch with @ NXP to help diagnose this and help get the info Xilinx needs?

Best Regards

-Roger

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igorpadykov
NXP Employee
NXP Employee

Hi Roger

NXP has special service for helping to develop custom drivers, Professional Services
https://www.nxp.com/support/support/nxp-professional-services:PROFESSIONAL-SERVICE 

Best regards
igor

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igorpadykov
NXP Employee
NXP Employee

Hi Rogers

one can look on below link (the same approaches should work for i.MX7D)

i.MX6Q PCIe EP/RC Validation System 

and check description of PCIe driver in Linux Manual available in linux package documentation on

https://www.nxp.com/support/developer-resources/run-time-software/i.mx-developer-resources/i.mx-6ser...

recommended to test with nxp linux releases:

linux-imx - i.MX Linux kernel 

Best regards
igor
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rthornblad
Contributor II

Hello Igor,

Thanks for your reply.  We can try your suggestions above.

So far our best guess is the I.mx7 is not seeing rx data.

Xilinx have asked us to check if the I.mx7 is internally seeing any data coming from the Xilinx device.  Is this possible? 

I haven't found anything definitive beyond the debug registers 1 and 2.

Best Regards,

-Roger

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rthornblad
Contributor II

here is a quick diagram of our card and adapter system

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