Hardware design checklist for i.mx6q/i.mx6dl

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Hardware design checklist for i.mx6q/i.mx6dl

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jimmyli
Contributor IV

     Now, we meet with the imx6q/imx6dl application question showed below.

     QS: Every finished product needs to be ddr calibrated. If not, many products will boot failed or crash when play video continuously. We checked from software fist, but haven't found the potential reason. Now, we plan to check the hardware design.

     Help: Is that any advise or technical document (checklist, etc.) to support us.

     Thanks a lot.

     Note: Our products contains imx6q or imx6dl.

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jan_spurek
NXP Employee
NXP Employee

Hello Jimmy,

the DDR calibration procedures compensate for the time skews between data, their strobes and clock/command/address signals caused by length mismatches etc. The board manufacturing process has a finite precision and therefore all of its dimensions and parameters (dielectric constant,...) will have a certain variation around the optimal value. If the variation is too great, the calibration values for one board may not be applicable to another.

Best Regards,

Jan

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jimmyli
Contributor IV

Hi Jan,

     Thanks for your suggestion.

     That's important for me to develop the i.MX6.

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gusarambula
NXP TechSupport
NXP TechSupport

Hello Jimmy Li,

There is a Hardware Development Guide that should be of help (link below). Chapter 2 provides a checklist.

https://www.nxp.com/docs/en/user-guide/IMX6DQ6SDLHDG.pdf

There is also an application note regarding DDR calibration (AN4467 link below) that may help as long as the routing constraints listed on  the development guide are followed.

https://www.nxp.com/docs/en/application-note/AN4467.pdf

I hope this helps!

Regards,

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jimmyli
Contributor IV

Hi Gusarabula,

     Thanks.

     That's valuable for me.

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