GPIO Toggling Issue in i.MX8 DX6 Board.

cancel
Showing results for 
Search instead for 
Did you mean: 

GPIO Toggling Issue in i.MX8 DX6 Board.

985 Views
anjalikkrishna
Contributor III

Hi ,

       I am working on i.MX8 DX6 board where I am facing issue in toggling few GPIOs from GPIO 0 bank such as GPIO_04 , GPIO_05 , GPIO_07 . I have tried changing the drive strength of the GPIO's in pad settings but that did not solve the issue.

   When the GPIO's are made to toggle from the uboot, the data register of the corresponding GPIO's are getting reflected with the updated value but the GPIO's are in their default state when probed .

      I tried to configure the pads in the  SC firmware code and tried to toggle  the GPIOs. But the Issue persists.

Only these three GPIOs are not being able to control through software and the other GPIO's in the same bank are toggling.

And interesting part is ,in i.MX8QXP board , these  three GPIO's are working fine .

Attaching the CRO captured images of GPIO_4 toggling in  QXP and DX6  board.

Any one faced similar issue in i.MX8 DX6 board.?

Any help would be appreciated

0 Kudos
18 Replies

434 Views
anjalikkrishna
Contributor III

Hi Igor,

 We are using cutom hardware not NXP EVK

0 Kudos

434 Views
anjalikkrishna
Contributor III

Hi Igor,

      Thank You for the reply .

      I looked into SCFW documentation . But my doubts still not cleared . Let me elaborate it once again.

        The GPIO 4 configured to ESAI0_TX0 pad , GPIO 5 configured to ESAI0_TX1 pad  and GPIO 7 configured to ESAI0_TX2_RX3 pad requires IOMUXD_COMP_CTL_GPIO_1V8_3V3_GPIORHB  pad to be configured for toggling. But the GPIO 3 which is configured to ESAI0_SCKT pad still toggles without any extra settings. Even though all the GPIO's belong to a same pad group [ESAI0], each pins require different settings . As you answered some pads are dual voltage pads and some other single voltage pads. But basically these pins under this pad group supports 1.8 ,2.5 and 3.3 Voltage [VDD_ESAI_SPDIF_1P8_2P5_3P3] and our hardware team has fixed the voltage to 1.8 V for the 10 pins under this ESAI0 pad group.

So my question is , how one can identify the ESAI0_TX0,ESAI0_TX1,ESAI0_TX2_RX3 pads belong to dual voltage support pads and require IOMUXD_COMP_CTL_GPIO_1V8_3V3_GPIORHB pad to be configured while ESAI0_SCKT is single voltage pad?

0 Kudos

434 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Anjalik

for example for ESAI0_TX0 one can find RM description

indicationg dual voltage capability:

pastedImage_1.jpg

Best regards
igor

0 Kudos

434 Views
anjalikkrishna
Contributor III

Hi Igor,

     This was the field I strongly hoped to indicate the single and dual voltage support .But I can find the PDRV field with 1.8 and 3.3v voltage support under ESAI0_SCKT pad too and ESAI0_SCKT  is a single voltage supporting pad according to the findings till now.

Thanks & Regards,

Anjali

0 Kudos

434 Views
igorpadykov
NXP TechSupport
NXP TechSupport

regarding "extra settings", rev.B0 sets PSW_OVR for ENET segment to 

1'b1 by default (2.5V) and since ESAI0_TX0, ESAI0_TX1,ESAI0_TX3_RX2 are used for

ENET1 so GPIORHB field PSW_OVR should be set to 0 for 1.8/3.3V operation.

Best regards
igor

0 Kudos

434 Views
anjalikkrishna
Contributor III

Hi Igor,

         Thank You for the support and reply.

In your last reply since you have mentioned "rev.B0" particularly , I am concluding my second question

Whether these settings are required only for iMx8DX6 (B0 silicon)?

as answered to be yes.

After referring the fsl-imx8qxp-lpddr4-arm2.dts file ,

        pinctrl_fec2: fec2grp {
                        fsl,pins = <
                                SC_P_ESAI0_SCKR_CONN_ENET1_RGMII_TX_CTL         0x00000060
                                SC_P_ESAI0_FSR_CONN_ENET1_RGMII_TXC             0x00000060
                                SC_P_ESAI0_TX4_RX1_CONN_ENET1_RGMII_TXD0        0x00000060
                                SC_P_ESAI0_TX5_RX0_CONN_ENET1_RGMII_TXD1        0x00000060
                                SC_P_ESAI0_FST_CONN_ENET1_RGMII_TXD2            0x00000060
                                SC_P_ESAI0_SCKT_CONN_ENET1_RGMII_TXD3           0x00000060
                                SC_P_ESAI0_TX0_CONN_ENET1_RGMII_RXC             0x00000060
                                SC_P_ESAI0_TX3_RX2_CONN_ENET1_RGMII_RXD1        0x00000060
                                SC_P_ESAI0_TX2_RX3_CONN_ENET1_RGMII_RXD2        0x00000060
                                SC_P_ESAI0_TX1_CONN_ENET1_RGMII_RXD3            0x00000060
                        >;
                };

From the above code snippet , the ESAI0 pad is used for ENET1 as you said.But the ESAI0_SCKT is also used for ENET1. But the ESAI0_SCKT is still controllable without GPIORHB pad setting.

Thanks & Regards,

Anjali

0 Kudos

434 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Anjali

yes this is applicable only for B0 revision. I believe ESAI0_SCKT is already configured

 as rgmii output so it may be controllable without additional GPIORHB pad setting.

Best regards
igor

0 Kudos

434 Views
anjalikkrishna
Contributor III

HI Igor,

 Where this configuration is done [ESAI0_SCKT  as rgmii output] ? in SCFW?

In our software we have configured this pad to ALT 4 [GPIO]

0 Kudos

434 Views
igorpadykov
NXP TechSupport
NXP TechSupport

configuration is done in hardware as for rgmii this pin can be only output.

Best regards
igor

0 Kudos

434 Views
anjalikkrishna
Contributor III

Hi Igor,

      Can you please provide more information based on ESAI0_SCKT pad and its configuration in hardware as rgmii.?

Thanks & Regards,

Anjali

0 Kudos

434 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Anjali

one can apply to local marketing office for more details.

Note this part is still as "PREPRODUCTION", that is not fully supported.

i.MX 8X Applications Processors| Arm® Cortex®-A35, Cortex-M4 | NXP 

Best regards
igor

0 Kudos

434 Views
anjalikkrishna
Contributor III

Hi Igor,

     Thank You for the reply.

     I had gone through the chapter 9 of the reference manual and came across " Single voltage and dual voltage pad " .

     How can we identify whether the pad belongs to single voltage or dual voltage?

     I am still going through the reference manual for identifying the single voltage and dual voltage pads.

Thanks & Regards,

Anjali

0 Kudos

434 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Anjalik

you can find answer yourself looking at your post with:

"IOMUXD_COMP_CTL_GPIO_1V8_3V3_GPIORHB  pad".

So you can look in scfw documentation for that pad API's.

SCFW Porting Kit

Best regards
igor

0 Kudos

434 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Anjalik

based on waveforms and that when part was emulated on i.MX8QXP MEK platform

there were no such issues, seems this is custom board hardware problem :

poor soldering or shorting to gnd/other signals. One can recheck board layout

and perform x-ray screening.

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 Kudos

434 Views
anjalikkrishna
Contributor III

Hi Igor,

  After configuring the IOMUXD_COMP_CTL_GPIO_1V8_3V3_GPIORHB  pad in the uboot source code the GPIO 4 , 5,7 under GPIO 0th bank started toggling. I still have few queries on this

Why pad control setting is necessary for few GPIO pins?

  • Other GPIO's under 0th bank are toggling without the above pad setting.

Whether these settings are required only for iMx8DX6 (B0 silicon)?

It would be great if these doubts are clarified. Awaiting for your reply.

Thanks & Regards,

Anjali

434 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Anjali

these are dual voltage pads and seems additional configuring

compensation for pad groups with dual voltage capability

is needed.

Best regards
igor

0 Kudos

434 Views
anjalikkrishna
Contributor III

Hi Igor,

   Thanks for the reply.

  We have done x-ray screening for a board from the assembly house and it is fine. We are facing this issue in all the boards so I think we can rule out the possibility of poor soldering or shorting to gnd/other signals.

Is there anything specifically to be taken care while designing the custom board based on i.MX8DX6 with respective to GPIOs?

0 Kudos

434 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Anjalik

no, there are no gpio specific to i.MX8DX6 settings.

Best regards
igor

0 Kudos