GPIO IRQ issues in i.MX8MM EVK

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GPIO IRQ issues in i.MX8MM EVK

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sreedhar_appala
Contributor IV

Hi,

My query was marked as spam : https://community.nxp.com/t5/i-MX-Processors/GPIO5-IO26-IRQ-issue-in-i-MX8MM-EVK-HW/m-p/1261756#M172...

so, I am reposting again with different title.

My Query starts:

-----------------------

I am working with i.mx8mm evk hw and yocto distribution 4.19 warrior version.

My application requires rising edge sensitive interrupt, so i need to use gpio pins instead of EXP_IO interrupt (which is giving level sensitive interrupts). so i choosed UART3_RxD / GPIO5_IO26 pin for my IRQ

I am trying to use GPIO5_IO26 for IRQ operation, uart3_rxd pad is muxed with gpio5_io26.

I made the below changes in the dts file.

my_irq_pin: my_irq_pin {
        compatible = "my_drv";
        interrupt-parent = <&gpio5>;
        interrupts = <26 IRQ_TYPE_EDGE_RISING>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_myirq_pin>;
        status = "okay";
};

&iomuxc {
         pinctrl-names = "default";

         ..................

         imx8mm-evk {
                 pinctrl_myirq_pin: myirq_pin {
                        fsl,pins = <

                             MX8MM_IOMUXC_UART3_RXD_GPIO5_IO26        0x16

                        >
                 };

                 pinctrl_uart1: uart1grp {
                        fsl,pins = <

                             MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
                             MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
                             /*MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140 */
                             MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
                             MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x19
                        >;

                 };
                 ..................

         };
};

commented out the red colored pad mux and ctrl for uart3_rxd in   pinctrl_uart1: uart1grp

 

In my driver code, i have registered the IRQ handler as below:

irq_num = platform_get_irq(pdev, 0); /* The irq_num for GPIO5_IO26 seems 218 */


if (request_irq(irq_num, my_isr_irq_handler,
IRQF_TRIGGER_RISING, "my_isr", NULL) != 0) {
        pr_err("Fail to request my_isr irq interrupt!\n");
        return -1;
}

/* My ISR Handler Function */

irqreturn_t my_isr_irq_handler(int irq, void *dev_id)
{
    pr_info("%s\n",__func__);
    return IRQ_HANDLED;
}

 

#cat /proc/interrupts

        CPU0         CPU1        CPU2          CPU3
218: 0                 0               0                  0           gpio-mxc  26   Edge    my_isr

 

sreedhar_appala_0-1618391244220.png

 

At J1003, Pin 10, I have applied a pulse of duty 400 usecs. But surprisingly for me the isr handler : my_isr_irq_handler   is not invoked.

Could you please help me to resolve this problem.
Thank you, Sreedhar

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1 Solution
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igorpadykov
NXP Employee
NXP Employee

Hi Sreedhar

 

one can check if interrupt event was registered in gpio interrupt status register described in

sect.8.3.3.7 GPIO interrupt status register (GPIOx_ISR)

i.MX 8M Mini Applications Processor Reference Manual

For debugging one can use memtool 

https://source.codeaurora.org/external/imx/imx-test/tree/test/memtool?h=imx_5.4.70_2.3.0

or AN4553  Using Open Source Debugging Tools for Linux on i.MX Processors

 

Best regards
igor

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1 Reply
1,994 Views
igorpadykov
NXP Employee
NXP Employee

Hi Sreedhar

 

one can check if interrupt event was registered in gpio interrupt status register described in

sect.8.3.3.7 GPIO interrupt status register (GPIOx_ISR)

i.MX 8M Mini Applications Processor Reference Manual

For debugging one can use memtool 

https://source.codeaurora.org/external/imx/imx-test/tree/test/memtool?h=imx_5.4.70_2.3.0

or AN4553  Using Open Source Debugging Tools for Linux on i.MX Processors

 

Best regards
igor

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