Hello,
the mentioned specs (from Samsumg) are standard requirements for DRAM signals during
operations, when data bus state should be dynamically changed. The i.MX28 keeper option
are used to configure pin's state for relatively long time (statically). As general example, it makes
sense for multi-master system, when one master should free bus for others.
Hope the following tutorial helps to understand keeper operation.
http://www.ti.com/lit/an/scla015/scla015.pdf
Regards,
Yuri.