FEC_MIIGSK_CFGR and FEC_MIIGSK_ENR registers not documented in RM or datasheet

[bikenomad]

In the i.mx53RM and i.mx53IEC manuals, I can't find any documentation of the bits within the FEC_MIIGSK_CFGR and FEC_MIIGSK_ENR registers.

The following bits are referred to in the manual but not documented. I have added what I think from reading the Linux sources is the correct positions, but am not sure.

FEC_MIIGSK_CFGR (0x63FE_C300):

• I/F_MODE bit[1:0], 01=RMII, 00=MII
• FRCONT  bit6, 1=force 10Mbps
• LBMODE

FEC_MIIGSK_ENR (0x63FE_C308)

• EN bit1
• READY  bit2, r/o

What is the correct definition of these registers?

Also, can someone make a note to fix the manuals?

Thanks...

[Yuri]

Hello,

 Your definition of the registers is correct.

Regards,

Yuri.

[EdSutter]

This may help a bit...

http://imxcommunity.org/group/imx53quickstartboard/forum/topics/can-t-find-any-description-of-fec-mi...

[EdSutter]

Did you ever figure this out?  I have the same question, and will be posting to other groups shortly.