External LDO on NVCC_PLL_OUT for iMQ6Q

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External LDO on NVCC_PLL_OUT for iMQ6Q

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gavinjones
Contributor I

Dear Community,

I have been looking at two reference designs for the iMQ6Q:

iMX6 Sabre Board Rev C3, schematic available from the Freescale website.

Sabre Lite Board Rev D, schematic available at http://boundarydevices.com/sabre_lite-revD.pdf

The Sabre Board has an optional LDO with a note saying it "may be desired for NVCC_PLL_VOUT" (U9 on page 20). Similarly, the Sabre Lite Board feeds the NVCC_PLL_OUT pin from an external 1.2V LDO (U23 on page 2). However, the iMX6 documentation shows that there is an internal LDO for this pin and makes no mention of feeding it from an external LDO. Why might an external LDO be required?

Thanks,

Gavin.

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MT
NXP Employee
NXP Employee

Hi Gavin,

Early revisions of the i.MX6 silicon (Rev 1.0) had an errata that required an external regulator. The errata was fixed in Rev 1.1 and later silicon, so the regulator is no longer required. See the post below:

https://community.freescale.com/message/328349#328349

Regards

Mark

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MT
NXP Employee
NXP Employee

Hi Gavin,

Early revisions of the i.MX6 silicon (Rev 1.0) had an errata that required an external regulator. The errata was fixed in Rev 1.1 and later silicon, so the regulator is no longer required. See the post below:

https://community.freescale.com/message/328349#328349

Regards

Mark

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gavinjones
Contributor I

Excellent, thanks Mark.

Best regards,

Gavin.

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