Establishing video modes and connectors on imx8ulp

[bhallen]

I'm using an imx8ulp as part of the Advantech ROM-2620 in our own circuit. I'm having a heck of a time getting the video (drm) system to successfully give me a framebuffer. 

The video chain is IMX8ULP (dsi) -> TI SN65DSI83 (lvds) -> TI SN65LVDS822 (rgb) -> panel.

The SN65LVDS822 is transparent and requires no configuration. I have managed to get all the individual parts to successfully probe, but the drm system fails to complete. I get the kernel message:

imx-dcnano-drm 2e050000.display-controller: [drm] Cannot find any crtc or sizes

This traces back to drm_fb_helper.c: drm_fb_helper_single_fb_probe(). It sees the connector registered by panel-lvds, but cannot match it up to a mode_set. I've been digging on this for several days at this point. There's got to be some simple configuration item that's missing. 

Please see the attached kernel log and device tree.

Thank you so much!

[bhallen]

Thank you for putting this together. I'm still unsuccessful getting this to work. Can you please share the kernel defconfig you used?

[Zhiming_Liu]

Hi @bhallen 

I have managed to get all the individual parts to successfully probe, but the drm system fails to complete

-->Can you share more detail about how you managed to geit it probe successfully?

Best Regards,
Zhiming

[bhallen]

Initially there were a few deferred probes due to device tree and kernel config issues. It was just a matter of working through them. There's probably a few 'probe start' and 'probe end' messages left in the kernel log I used for debugging.

[Zhiming_Liu]

Hi @bhallen 

From the kernel log, the drm framework can't get encoder, the encoder here should be DSI driver, but it shows None-34 . The dsi attach time is not correct. You could try to move the xxxx_attach_dsi function in  xxxx_probe to  xxxx_bridge_attach in  TI SN65DSI83 driver. Usually -517 is caused by a linking error, and since you've made sure that the structure in the device tree is correct, the probable cause is that the driver attaches at the wrong time.

Attached bridge /panel to encoder None-34

Best Regards,
Zhiming

[bhallen]

I modified the ti-sn65dsi83.c driver like this, while commenting out the calls in _probe:

static int sn65dsi83_attach(struct drm_bridge *bridge,
	enum drm_bridge_attach_flags flags)
{
	struct sn65dsi83 *ctx = bridge_to_sn65dsi83(bridge);
	int ret;

	dev_warn(ctx->dev, "Bridge attach start\n");

	drm_bridge_add(&ctx->bridge);
	ret = sn65dsi83_host_attach(ctx);
	if (ret) {
		dev_warn(ctx->dev, "Host attach fail: %d\n", ret);
		goto err_remove_bridge;
	}

	ret = drm_bridge_attach(bridge->encoder, ctx->panel_bridge,
		&ctx->bridge, flags);

err_remove_bridge:
	if(ret)
		drm_bridge_remove(&ctx->bridge);
	dev_warn(ctx->dev, "Bridge attach end: %d\n", ret);
	return ret;
}

Still doesn't work - probably worse behavior. sn65dsi83_host_attach() is where devm_mipi_dsi_attach() occurs. I messed around with the ordering of the calls with no effect. 

[Zhiming_Liu · Accepted solution]

Hi @bhallen 

I did test on i.MX8ULP EVK without the real hardware, didn't move the attach function location. The attach is successful.

[    1.971782] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
[    1.980038] i2c 0-002c: Fixed dependency cycle(s) with /soc@0/bus@2d800000/dsi@2db00000
[    1.985100] Bluetooth: BNEP filters: protocol multicast
[    1.998230] Bluetooth: BNEP socket layer initialized
[    2.003177] Bluetooth: HIDP (Human Interface Emulation) ver 1.2
[    2.005391] sn65dsi83 0-002c: supply vcc not found, using dummy regulator
[    2.009108] Bluetooth: HIDP socket layer initialized
[    2.016593] imx_rpmsg_i2c i2c-rpbus-0: add I2C adapter i2c-rpmsg-adapter successfully
[    2.021109] 8021q: 802.1Q VLAN Support v1.8
[    2.029668] imx_rpmsg_i2c i2c-rpbus-1: add I2C adapter i2c-rpmsg-adapter successfully
[    2.032757] lib80211: common routines for IEEE802.11 drivers
[    2.046215] 9pnet: Installing 9P2000 support
[    2.050712] Key type dns_resolver registered
[    2.055217] NET: Registered PF_VSOCK protocol family
[    2.101369] registered taskstats version 1
[    2.106651] Loading compiled-in X.509 certificates
[    2.155517] mxs_phy 29910000.usb-phy: supply phy-3p0 not found, using dummy regulator
[    2.163792] mxs_phy 29930000.usb-phy: supply phy-3p0 not found, using dummy regulator
[    2.194474] imx_rpmsg_pwm pwm: add PWM chip 0 successfully
[    2.206536] nwl-dsi 2db00000.dsi: [drm:nwl_dsi_probe] Using DCNANO as input source
[    2.221315] pps pps0: new PPS source ptp0
[    2.229984] fec 29950000.ethernet eth0: registered PHC device 0
[    2.554649] mxc-mipi-csi2 2daf0000.csi: lanes: 2, name: mxc-mipi-csi2.0
[    2.576084] sn65dsi83 0-002c: supply vcc not found, using dummy regulator
[    2.583646] nwl-dsi 2db00000.dsi: [drm:nwl_dsi_host_attach] lanes=4, format=0x0 flags=0x2e3
[    2.585027] mmc0: SDHCI controller on 298d0000.mmc [298d0000.mmc] using ADMA
[    2.592301] [DEBUG] sn65dsi83_host_attach success
[    2.607436] pca953x 7-0021: supply vcc not found, using dummy regulator
[    2.614329] pca953x 7-0021: using no AI
[    2.618922] i2c i2c-7: LPI2C adapter registered
[    2.628131] [drm] Initialized imx-dcnano 1.0.0 20201221 for 2e050000.display-controller on minor 1
[    2.677055] panel-lvds panel: Skipping enable of already enabled panel
[    2.685827] mmc0: new HS400 Enhanced strobe MMC card at address 0001
[    2.686891] mmcblk0: mmc0:0001 DA6032 29.1 GiB
[    2.688963]  mmcblk0: p1 p2
[    2.689867] mmcblk0boot0: mmc0:0001 DA6032 4.00 MiB
[    2.691698] mmcblk0boot1: mmc0:0001 DA6032 4.00 MiB
[    2.693376] mmcblk0rpmb: mmc0:0001 DA6032 4.00 MiB, chardev (234:0)
[    2.718358] Console: switching to colour frame buffer device 100x37
[    2.775649] imx-dcnano-drm 2e050000.display-controller: [drm] fb0: imx-dcnanodrmfb frame buffer device
[    2.796128] sdhci-esdhc-imx 298f0000.mmc: allocated mmc-pwrseq
[    2.831181] mmc2: SDHCI controller on 298f0000.mmc [298f0000.mmc] using ADMA
[    2.842843] input: gpio-keys as /devices/platform/gpio-keys/input/input1
[    2.850287] rtc_rpmsg virtio0.rpmsg-rtc-channel.-1.6: new channel: 0x405 -> 0x6!

DTS change:

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
index 6e6d04c2be81..366baab448fb 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
@@ -34,6 +34,35 @@ memory@80000000 {
 		reg = <0x0 0x80000000 0 0x80000000>;
 	};
 
+	panel {
+		compatible = "panel-lvds";
+		width-mm = <170>;
+		height-mm = <28>;
+		data-mapping = "jeida-18";
+
+		panel-timing {
+			clock-frequency = <49500000>;
+			hactive = <800>;
+			hback-porch = <48>;
+			hfront-porch = <312>;
+			hsync-len = <40>;
+			vactive = <600>;
+			vback-porch = <19>;
+			vfront-porch = <61>;
+			vsync-len = <20>;
+			hsync-active = <0>;
+			vsync-active = <0>;
+			de-active = <1>;
+			pixelclk-active = <1>;
+		};
+
+		port {
+			panel_out_bridge: endpoint {
+				remote-endpoint = <&bridge_out_panel>;
+			};
+		};
+	};
+
 	rpmsg_keys: rpmsg-keys {
 		compatible = "fsl,rpmsg-keys";
 
@@ -255,8 +284,11 @@ &dsi {
 	ports {
 		port@1 {
 			reg = <1>;
-			mipi_dsi_out: endpoint {
-				remote-endpoint = <&it6161_from_dsim>;
+
+			dsi_out_bridge: endpoint {
+				data-lanes = <1 2>;
+				lane-polarities = <1 0 0 0 0>;
+				remote-endpoint = <&bridge_in_dsi>;
 			};
 		};
 	};
@@ -335,11 +367,41 @@ ite_bridge: it6161@6c {
 		enable-gpios = <&pca6416_1 9 GPIO_ACTIVE_LOW>;
 		interrupt-parent = <&rpmsg_gpioa>;
 		interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
+		status = "disabled";
+
+		// port {
+		// 	it6161_from_dsim: endpoint {
+		// 		remote-endpoint = <&mipi_dsi_out>;
+		// 	};
+		// };
+	};
+	bridge@2c {
+		compatible = "ti,sn65dsi83";
+		reg = <0x2c>;
+		enable-gpios = <&pca6416_1 9 GPIO_ACTIVE_HIGH>;
 		status = "okay";
+		// pinctrl-names = "default";
+		// pinctrl-0 = <&pinctrl_dsi_bridge>;
 
-		port {
-			it6161_from_dsim: endpoint {
-				remote-endpoint = <&mipi_dsi_out>;
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				bridge_in_dsi: endpoint {
+					remote-endpoint = <&dsi_out_bridge>;
+					data-lanes = <1 2 3 4>;
+				};
+			};
+
+			port@2 {
+				reg = <2>;
+
+				bridge_out_panel: endpoint {
+					remote-endpoint = <&panel_out_bridge>;
+				};
 			};
 		};
 	};
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
index 8a23116346a8..bb1509151f75 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
@@ -471,15 +471,15 @@ static void sn65dsi83_atomic_pre_enable(struct drm_bridge *bridge,
 	/* Enable PLL */
 	regmap_write(ctx->regmap, REG_RC_PLL_EN, REG_RC_PLL_EN_PLL_EN);
 	usleep_range(3000, 4000);
-	ret = regmap_read_poll_timeout(ctx->regmap, REG_RC_LVDS_PLL, pval,
-				       pval & REG_RC_LVDS_PLL_PLL_EN_STAT,
-				       1000, 100000);
-	if (ret) {
-		dev_err(ctx->dev, "failed to lock PLL, ret=%i\n", ret);
-		/* On failure, disable PLL again and exit. */
-		regmap_write(ctx->regmap, REG_RC_PLL_EN, 0x00);
-		return;
-	}
+	// ret = regmap_read_poll_timeout(ctx->regmap, REG_RC_LVDS_PLL, pval,
+	// 			       pval & REG_RC_LVDS_PLL_PLL_EN_STAT,
+	// // 			       1000, 100000);
+	// if (ret) {
+	// 	dev_err(ctx->dev, "failed to lock PLL, ret=%i\n", ret);
+	// 	/* On failure, disable PLL again and exit. */
+	// 	regmap_write(ctx->regmap, REG_RC_PLL_EN, 0x00);
+	// 	return;
+	// }
 
 	/* Trigger reset after CSR register update. */
 	regmap_write(ctx->regmap, REG_RC_RESET, REG_RC_RESET_SOFT_RESET);
@@ -663,7 +663,7 @@ static int sn65dsi83_host_attach(struct sn65dsi83 *ctx)
 		dev_err(dev, "failed to attach dsi to host: %d\n", ret);
 		return ret;
 	}
-
+	printk("[DEBUG] sn65dsi83_host_attach success\n");
 	return 0;
 }
 

Best Regards,
Zhiming

[bhallen]

Thank you for putting this together. I'm still unsuccessful getting this to work. Can you please share the kernel defconfig you used?

[Zhiming_Liu]

Hi @bhallen 

I didn't modify the defconfig in linux-imx: linux-imx/arch/arm64/configs/imx_v8_defconfig at lf-6.6.52-2.2.0 · nxp-imx/linux-imx

Did you try to apply previous patch directly and test ?

Best Regards,
Zhiming

[bhallen]

So I figured out a clue. If I use the 800x600 panel you defined in the device tree, it all works. However, my display is hardware defined as 480x800 (portrait) which is getting rejected somehow. I've tried other display timings (from panel-simple) and some work and some don't. I've tried using panel-simple instead of panel-timings as well without success. I've yet to make 480x800 work. Is there any guidance on how to set successful timings?

This is what I'm currently using:

		panel-timing {
				clock-frequency = <25000000>;
				hactive = <480>;
				vactive = <800>;
				hfront-porch = <20>;
				hback-porch = <15>;
				hsync-len = <10>;
				vback-porch = <3>;
				vfront-porch = <6>;
				vsync-len = <3>;
				hsync-active = <0>; 
				vsync-active = <0>;
				de-active = <1>;
				pixelclk-active = <0>;
		}; 

Thank you!

[Zhiming_Liu]

Hi @bhallen 

Please make sure that your panel support 400x800, usually the screen spec specifies fixed values for hactive and vactive, this can't be swapped over. If your screen spec is vertical, and you want it to display horizontal, you can only configure the rotation through user space, e.g. weston.ini.

Best Regards,
Zhiming

[bhallen]

The problem was related to the pixel clock. In drivers/gpu/drm/imx/dcnano/dcnano-crtc.c dcnano_crtc_find_pll_clock_rate(), if the given pixel clock can't be exactly matched to a PLL setting, then the kernel fails to register the display. There are some debug messages in the function, but even with loglevel turned on all the way, I never saw them. Failure to find the PLL clock rate should be reported as an error here, not as a debug message that no one will see. This would have saved me a couple weeks of work (and an unhappy customer)!

Your solution did get me on the right road though, so thank you.