Error detected in the function BOARD_SetRunClock() in Clock_config_ocram.c of SDK_2.2_MCIM6ULL

[fisher-001]

Hi NXP support team,

When I read the source code in the package SDK_2.2_MCIM6ULL. I have a few questions, take the demo hello_world as an example:

1. Why every demo_app project invokes BOARD_SetRunClock() every time? And when I dig into the source code, the comments section tells me that this function is resident in ocram. And this function was invoked by inline assembly code. my question is: why do the demo project need to do so? and as the reference manual says, the clock values are set by the boot rom code.

2. After looking into the function BOARD_SetRunClock(), it seems that, something wrong, see code excerpt below:

/* Select PLL3 to generate pll3_sw_clk */
CCM->CBCDR = (CCM->CBCDR & ~CCM_CCSR_PLL3_SW_CLK_SEL_MASK) | CCM_CCSR_PLL3_SW_CLK_SEL(0);

But when I look at the reference manual, the register CCM_CCSR is responsible for selecting the clock source of pll3_sw_clk rather than CCM_CBCDR. Is that right?

Looking forward to hearing from you experts.

Thanks,

Fisher

[Sanket_Parekh]

Hi @fisher-001 

I hope you are doing well.

Please find my answers from below.

1. Why every demo_app project invokes BOARD_SetRunClock() every time? And when I dig into the source code, the comments section tells me that this function is resident in ocram. And this function was invoked by inline assembly code. my question is: why do the demo project need to do so?

-> The demo project needs to do so because every demo app invokes the BOARD_SetRunClock() to select and modify the clock settings for our demo app as per our need. This is true that clock values are set by the boot rom code, but that is only for booting and initialization purposes. And Yes, This is part of ocram as per comments that can be used after boot also for our demo app.

1. But when I look at the reference manual, the register CCM_CCSR is responsible for selecting the clock source of pll3_sw_clk rather than CCM_CBCDR. Is that right?

-> In the register configuration for pll3_sw_clk, We are looking into it. we will get back to you soon.

Thanks & Regards

Sanket Parekh

[Sanket_Parekh]

Hi,

I Hope you are doing well.

Please find some details regarding this.

2. But when I look at the reference manual, the register CCM_CCSR is responsible for selecting the clock source of pll3_sw_clk rather than CCM_CBCDR. Is that right?

-> Yes, It should be CCSR register, But unfortunately SDK_2.2_MXC6ULL is an older version and also the package SDK_2.2_MXC6ULL is not supported anymore and there are no updates/fixes for it.

Thanks & Regards

Sanket Parekh