The latest available errata sheets for i.MX6 UL/ULL are from 2017/09. Since then, several new erratas have been found and published at different places on NXP community / the internet.
For me a as developer it is absolutely frustrating to spend time on problems which are caused by erratas already known by the chip manufacturer.
Stopping maintaining the reference manuals shortly after initial publication is bad enough, but not keeping the errata sheets up to date causes unnecessary work overhead for all engineers using NXP's products.
Hello Christian Eggers,
I understand your frustration with the lag on errata updates (or lack of updates).
Some errata for the ARM cores are published by ARM and may not be integrated on the errata document. I will escalate your feedback.
please note that my question is particularly targeted to the SOC specific (non ARM) bugs. I hope that the ARM related bugs are already published by ARM.
Thank you for clarifying. If you would you please provide examples of these SOC errata you have found on these communities or elsewhere it will greatly help us escalating this situation. I was reviewing the current errata and it's true that for example ERR010872 is not listed on the Errata document as it was handled independently with other documentation (which indeed has caused a bit of confusion).
ERR010872 is one of the errata I had in mind. Additionally I am aware of:
Additionally my systems fails when I access two devices simultaneously on the SPBA bus:
Maybe I am the first who hits this problem, but this looks also like a potential errata for me. Please let me know if you can investigate this.
Additionally I already reported incomplete documentation of the i.MX6ULL fuses (Spreadsheet for i.MX6ULL fusemap, [i.MX6ULL] NAND boot: Search Stride and Search Count ) and several holes in the security reference manual ([i.MX6ULL] NVTK , [i.MX6ULL] Key path control fuse ).
Hello Christian Eggers,
I would like to thank you for your inputs. Some of these errata should be added to the documentation (like general purpose fuses not being programmable) and have been escalated so that they may be included in future releases documentation releases. However, some errata related to the ARM core are often handled by ARM and are often not added to the i.MX documentation. That’s why some errata documents have not been updated in a while.
My apologies for this cumbersome situation and thank you for your feedback. Hopefully this process can be improved for newer processors.