Dear all,
We want to use ENET1 as RMII function.
In this case, we have a question about pin setting of Reference Clock.
<Question>
When I use a reference clock for RMII, how should I set ENET1_TX_CLK?
There is a different description about ENET1_TX_CLK pad in Reference Manual.
IMX6ULLRM Rev. 0, 09/2016:
- Table 23-1. ENET1 External Signals(P.950)
I seem that ENET1_TX_CLK pad is set to ALT1(ENET1_REF_CLK1).
However, in IOMUXC_SW_MUX_CTL_PAD_ENET1_TX_CLK description, ALT1 is UART7_CTS_B setting.
IMX6ULLRM Rev. 0, 09/2016:
- 33.6.39 SW_MUX_CTL_PAD_ENET1_TX_CLK SW MUX Control Register (IOMUXC_SW_MUX_CTL_PAD_ENET1_TX_CLK) (P.1580)
Here, I seem that ENET1_TX_CLK pad setting for ENET1_REF_CLK1 function is ALT4.
In addition, accoding to the schematic for RMII of MCIMX6ULL-EVK(CM) and PIN tool(V3.0.2) for MCIMX6ULL-EVK-REV-A,
ENET1_TX_CLK(F14) pin is used as ENET1_TX_CLK signal.
I am confused.
About a reference clock for RMII, please tell me the right setting.
Best Regards,
Yuuki
Solved! Go to Solution.
Hello,
ENET1_TX_CLK is used as ENET1_REF_CLK1 (ALT4 mode) in the reference design..
Have a great day,
Yuri
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Hello,
ENET1_TX_CLK is used as ENET1_REF_CLK1 (ALT4 mode) in the reference design..
Have a great day,
Yuri
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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