ECSPI2 CHANNEL_SELECT bits in the control register

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ECSPI2 CHANNEL_SELECT bits in the control register

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Promag-kt
Contributor I

Hi all,

I am trying to add more than one device to ECSPI2 on an i.mx8mm. The linux reference manual says that it has four chip select signals, which I am assuming are controlled with the CHANNEL_SELECT field of ECSPI2_CONREG at 0x3083_0008. 

In the applications processor reference manual, 3/4 of the channel select settings for ECSPI2_CONREG are reserved: 

Screenshot from 2022-10-25 10-37-17.png

Does this mean that ECSPI2 can only support one CS? If so, why does the linux reference manual say it can support four? 

Thank you for your time.

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kef2
Senior Contributor V
  • The linux reference manual says that it has four chip select signals,

On Linux amount of chip selects is limited only by amount of spare GPIO pads. Any GPIO can act as chip select. If you mean hardware chip select signal(s), Linux eCSPI driver with HW CS works properly only up to 64 byte transfers. For longer transfers you should use GPIO CS instead because on longer transfers HW CS will pulse each 8 / 16 or 32 SCK pulses. 

(Here's experimental patch to extend ECSPI HW CS usage up to 512 byte transfers).

Amount of HW CS signals depends on SOC. If you are unclear how many HW CS's are available, look in your Reference Manual IOMUX pad settings for eCSPI SS instances like SS0, SS1, etc.

Regards,

Edward

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