Doese the i.MX6 ESAI interface can support up to 2.048MHZ PCM bus

[uolli]

Hi All,

I am planning to use i.MX6 ESAI interface to connect a SI3050 SiLabs codec, that codec is 2.048MHZ PCM high way, i checked datasheet of i.MX6 ESAI, that shows "Enhanced Serial Audio Interface (ESAI), up to 1.4 Mbps per channel", what is this mean? if that mean the ESAI interface only support up to 1.4MHZ pcm high way, but in the user manual Rev C of i.MX6 page 1217 said:

"The network mode is similar in that it is also intended for periodic transfers; however, it supports up to 32 words (time slots) per period. This mode can be used to build time division multiplexed (TDM) networks.", seems it can support up to 2.048mhz pcm high way, in details, that manual said it supports up to 32 time solts, as each timeslots is 8bits as least, if the sync clock is 8khz, then 8khz * 8 * 32 = 2.048mhz! am i correct with this?

also, in the manual page 1225 mentioned:

"Although the external ESAI serial clocks can be independent of

and asynchronous to the internal 133 MHz ESAI system clock,

the external ESAI serial clock frequency cannot exceed

133MHz/4 = 33.25 MHz and each external ESAI serial clock

phase must exceed the minimum of 2 x 1/133MHz = 15.04ns"

we can see the serial clock of ESAI can up to 33.25MHZ, but why the data sheet said "Enhanced Serial Audio Interface (ESAI), up to 1.4 Mbps per channel".

Thank you.

Uolli

[sumit8915]

Hello Uolli,

  We are also having similar kind of use case where we are using SLIC CODEC from Microsemi (LE9641). Le9641 Features a host port interface for communicating with VIOP processors and SOC using PCM and SPI. The host port interface supports PCM Clock rates of 1.024MHz, 1.536MHz, 2.048MHz. 3.073MHz, 4.096Mhz, 6.144MHz and 8.192Mhz with a Frame SYNC of 8KHz.

We have a custom designed board, where we have connected this PCM and SPI pins of CODEC IC with AUDMUX (AUD5) interface and the SPI interface of i.MX6D processor respectively.

We are able to communicate with the CODEC IC through SPI interface and while configuring SSI interface of the processor for PCM bus communication ,we are not getting the PCM clock which has to come from the processor side.

Please suggest us some solution regarding this.!!!

Thanks

Sumti

[uolli]

For example, if i want to use the SDO5/SDI0[PC6] for the pcm data in and data out, connect the a 2.048mhz to clk, a 8khz to sync, is this possible?

[SergioSolis · Accepted solution]

Hello Uolli,

yes, you could get to the ESAI to 2.48mhz, I am attaching a document where you can edit the dividers and PLL's to achieve 2.48mhz in the ESAI (you will need to lower the PLL speed).

[uolli]

Thank you SerchMX. as i can use a extra 2.048MHZ for the main clock, if the ESAI can running on 2.048MHZ and can process 32 time slots, that is good for me :smileyhappy:. also, does freescale have some document for connect the ESAI or SSI to a ST-BUS codec?

Thanks.