Hi, guys:
Recently I'm trying kernel 4.1(I was working in kernel 3.0.35 for a long time), now one question is made me crazy:
Does gpio's config in device tree always just set bit 31 as high(and leave all ohter bits 0)?
In arch/arm/boot/dts/imx6qdl-sabresd.dtsi:
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
...}
seems use PAD as GPIO all I need to do is set its config as 0x8000000.
But I got an except here, in the same file:
pinctrl_gpio_keys: gpio_keysgrp {
fsl,pins = <
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
>;
};
From Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt, I got a brief described:
Bits used for CONFIG:
NO_PAD_CTL(1 << 31): indicate this pin does not need config.
Geez, why pinctrl_gpio_keys need to set these gpio configs as 0x1b0b0?
I also check the IMX6QDRM, and found 0x1b0b0 is the default value of IOMUXC_SW_PAD_CTL_PAD_XXX_XXX.
Any suggestion will be appreciated, thanks.
Wally