Does i.MX8M Mini support swapping RTS and CTS on ECSPI2_SS0 and ECSPI2_MISO?
According to both the default pins-imx8mm.h file in the NXP kernel (include/dt-bindings/pinctrl/pins-imx8mm.h), there are settings for this:
#define MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x20C 0x474 0x000 0x1 0x0
#define MX8MM_IOMUXC_ECSPI2_MISO_UART4_DTE_RTS_B 0x20C 0x474 0x508 0x1 0x0
#define MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x210 0x478 0x508 0x1 0x1
#define MX8MM_IOMUXC_ECSPI2_SS0_UART4_DTE_CTS_B 0x210 0x478 0x000 0x1 0x0
In addition, the pins tool (v5, downloaded today), also indicates this:
For uart4_cts_b, these are the options:
For uart4_rts_b, these are the options:
According to the reference manual, rev 1, there is some support for the source pin of UART4_RTS_B, through the daisy chain (input select). There is no corresponding input select for UART_CTS_B.
Is it possible that there are settings both in the kernel and in the pins tool that are not correct?
UART supports 2 working modes: DCE or DTE, users can configure it to be DCE or DTE mode in device tree.
For example, UART4 works at DCE mode.
1. IOMUX for it's signals
2. signa's features
signal CPU pad direction conncetion with external DTE
UART4_CTS_B---->ECSPI2_MISO output DTE_UART_CTS( for DTE, CTS is input)
UART4_RTS_B---->ECSPI2_SS0 input DTE_UART_RTS(for DTE, RTS is output)
If you want CPU uart4 to work at DTE mode, signals will be like below:
signal CPU pad direction conncetion with external DCE
UART4_CTS_B---->ECSPI2_MISO input DTE_UART_RTS( for DCE, RTS is output)
UART4_RTS_B---->ECSPI2_SS0 output DTE_UART_CTS(for DCE, RTS is input)
3. For your application on iomux
you can configure it as DCE mode in dts, using these 2 iomux below.
MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B /* DCE mode, and UART4_CTS_B---->ECSPI2_MISO */
MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B /* DCE mode, and UART4_RTS_B---->ECSPI2_SS0 */
Hope above information can help you understand iomux of i.MX8MM!
Have a nice day!
weidong.sun, Thanks for your reply. I understand how DCE/DTE work. The question was really related to what is possible with the iomux.
The reference manual is mostly clear here - that UART4_RTS_B is muxed to ECSPI2_SS0, and UART4_CTS_B is muxed to ECSPI2_MISO.
What is not clear is that both the pins tool and the iomux pins definitions in the kernel imply that RTS and CTS for UART4 can be on either one of those pins. I think NXP should adjust both the iomux pins definition and the pins tool to remove the references to selections that are not real.
Now you can select UART4_CTS_B---->ECSPI2_MISO & UART4_RTS_B---->ECSPI2_SS0 in the pin mux tool in order to ensure your project continues. Anyway, we should base on Reference Manual.
For the question you mentioned on the pin mux tool, I will feed it back to the software department to confirm it.
Have a nice day!