Hi,
We are using S34ML08G2 from SPANSION, bootloader and kernel both working with this NAND flash memory, but when writing u-boot by kobs-ng, it fails with "unsupported geometry (2048/128)". Does this mean the geometry not supported by i.MX6SOLO ROM at all?
Thanks!
The Boot ROM code of the i.MX6Solo processor virtually supports any boot media NAND Flash configuration through the Firmware Configuration Block (FCB) structure, please refer to the Sections 8.5.2.2 "NAND Flash Boot Flow and Boot Control Blocks (BCB)" and 8.5.2.3 "Firmware Configuration Block" of the i.MX6Solo/DualLite Reference Manual Rev.1 document.
The error message you see most likely means that your NAND Flash configuration is not supported by the kobs-ng utility you use.
Have a great day,
Artur
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Hi Artur,
Thank you for the answer.
We got everything working with 4096+128 page size and 64 pages per block NAND. But now we are trying to use a 4GB MLC NAND which is 8192+744 page size and 256 pages per block. First we found the latest kobs-ng can not handle this geometry properly, so we modified kobs-ng as follows:
1. set ecc_chunk_size_in_bytes to 1024.
previous code assume oob size never greater than default ecc_chunk_size 512, but in kernel if this happens, ecc_chunk_size would be doubled to 1024, so change kobs-ng to follow same behavior of kernel.
2. change PAGES_PER_STRIDE to 256
previous code set it to 64, which would make the searching stride size of FCB and DBBT less than block size. Change it to 256, so the stride size is exact 1 block, and also set BOOT_CFG2[2:1] to be same value.
Then kobs-ng can write everything as expected, but ROM can not boot from NAND. Do you see anything could cause the problem here? Thanks!
Output of kobs-ng:
> ./kobs-ng init -v --search_exponent=1 /opt/pcscale/bootloader/boot.bin
MTD CONFIG:
chip_0_device_path = "/dev/mtd0"
chip_1_device_path = "(null)"
search_exponent = 1
data_setup_time = 80
data_hold_time = 60
address_setup_time = 25
data_sample_time = 6
row_address_size = 3
column_address_size = 2
read_command_code1 = 0
read_command_code2 = 48
boot_stream_major_version = 1
boot_stream_minor_version = 0
boot_stream_sub_version = 0
ncb_version = 3
boot_stream_1_address = 0
boot_stream_2_address = 0
/opt/pcscale/bootloader/boot.bin: verifying using key '00000000000000000000000000000000'
/opt/pcscale/bootloader/boot.bin: is a valid bootstream for key '00000000000000000000000000000000'
mtd: opening: "/dev/mtd0"
write size 8192, oobsize 744
NFC geometry :
ECC Strength : 56
Page Size in Bytes : 8936
Metadata size : 10
ECC Chunk Size in byte : 1024
ECC Chunk count : 8
Block Mark Byte Offset : 7545
Block Mark Bit Offset : 0
====================================================
mtd: opened '/dev/mtd0' - '(null)'
mtd: max_boot_stream_size_in_bytes = 1048576
mtd: boot_stream_size_in_bytes = 213852
mtd: boot_stream_size_in_pages = 27
mtd: #1 0x00800000 - 0x00900000 (0x0083435c)
mtd: #2 0x00800000 - 0x00900000 (0x0083435c)
FCB
m_u32Checksum = 0x00000000
m_u32FingerPrint = 0x20424346
m_u32Version = 0x01000000
m_NANDTiming.m_u8DataSetup = 80
m_NANDTiming.m_u8DataHold = 60
m_NANDTiming.m_u8AddressSetup = 25
m_NANDTiming.m_u8DSAMPLE_TIME = 6
m_u32PageDataSize = 8192
m_u32TotalPageSize = 8936
m_u32SectorsPerBlock = 256
m_u32NumberOfNANDs = 0
m_u32TotalInternalDie = 0
m_u32CellType = 0
m_u32EccBlockNEccType = 28
m_u32EccBlock0Size = 1024
m_u32EccBlockNSize = 1024
m_u32EccBlock0EccType = 28
m_u32MetadataBytes = 10
m_u32NumEccBlocksPerPage = 7
m_u32EccBlockNEccLevelSDK = 0
m_u32EccBlock0SizeSDK = 0
m_u32EccBlockNSizeSDK = 0
m_u32EccBlock0EccLevelSDK = 0
m_u32NumEccBlocksPerPageSDK = 0
m_u32MetadataBytesSDK = 0
m_u32EraseThreshold = 0
m_u32Firmware1_startingPage = 1024
m_u32Firmware2_startingPage = 1024
m_u32PagesInFirmware1 = 27
m_u32PagesInFirmware2 = 27
m_u32DBBTSearchAreaStartAddress = 512
m_u32BadBlockMarkerByte = 7545
m_u32BadBlockMarkerStartBit = 0
m_u32BBMarkerPhysicalOffset = 8192
m_u32BCHType = 0
m_NANDTMTiming.m_u32TMTiming2_ReadLatency = 0
m_NANDTMTiming.m_u32TMTiming2_PreambleDelay = 0
m_NANDTMTiming.m_u32TMTiming2_CEDelay = 0
m_NANDTMTiming.m_u32TMTiming2_PostambleDelay = 0
m_NANDTMTiming.m_u32TMTiming2_CmdAddPause = 0
m_NANDTMTiming.m_u32TMTiming2_DataPause = 0
m_NANDTMTiming.m_u32TMSpeed = 0
m_NANDTMTiming.m_u32TMTiming1_BusyTimeout = 0
m_u32DISBBM = 0
DBBT
m_u32Checksum = 0x00000000
m_u32FingerPrint = 0x54424244
m_u32Version = 0x01000000
m_u32DBBTNumOfPages = 0
Firmware: image #0 @ 0x800000 size 0x36000 - available 0x0
Firmware: image #1 @ 0x800000 size 0x36000 - available 0x200000
-------------- Start to write the [ FCB ] -----
mtd: erasing @0:0x0-0x200000
mtd: Writing FCB0 [ @0:0x0 ] (22e8) *
set MTDFILEMODE to MTD_MODE_RAW
mtd: erasing @0:0x200000-0x400000
mtd: Writing FCB1 [ @0:0x200000 ] (22e8) *
mtd_commit_bcb(FCB): status 0
-------------- Start to write the [ DBBT ] -----
mtd: erasing @0:0x400000-0x600000
mtd: Writing DBBT0 [ @0:0x400000 ] (2000) *
set MTDFILEMODE to MTD_MODE_NORMAL
mtd: erasing @0:0x600000-0x800000
mtd: Writing DBBT1 [ @0:0x600000 ] (2000) *
mtd_commit_bcb(DBBT): status 0
---------- Start to write the [ /opt/pcscale/bootloader/boot.bin ]----
mtd: Writting /opt/pcscale/bootloader/boot.bin: #0 @0: 0x00800000 - 0x00836000
mtd: erasing @0:0x800000-0xa00000
mtd: We write one page for save guard. *