Does MIPI-CSI interface of i.MX 8M Plus support non-continuous clock?

[andy_kim]

Hello Community,

I would like to know if MIPI-CSI2 interface of i.MX 8M Plus supports non-continuous clock?

and which document can I find the information of it?

Thank you.

Best regards,

Andy

[riteshmpatel · Accepted solution]

Hi @andy_kim.,

I hope you are doing well.
Please accept my apologies for the delay in response.

One of the features of the MIPI CSI Host Controller is that the pixel clock can be gated when no PPI data is coming and iMX8MP MIPI_CSI is compliant with MIPI D-PHY specification v1.2 which supports High-Speed mode and Low-Power mode. So, once data transmission has finished the clock lane can optionally switch back to a Low Power State for the non-continuous clock. 

One can refer to i.MX8M Plus Application Processor Reference Manual sections: 

13.5 MIPI_CSI

13.7 MIPI_DPHY

Thanks & Regards,
Ritesh M Patel