Documentation for SCU_PMIC_MEMC_ON pin at iMX8QM

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Documentation for SCU_PMIC_MEMC_ON pin at iMX8QM

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K_Steinhammer
Contributor III

Can someone give me a hint where the function of the SCU_PMIC_MEMC_ON pin on the iMX8QM is documented?

I can't find a anything in the Reference Manual or in the Datasheet except pin name and pin configuration, but no description for function or timing.

In the MEK schematic it is involved in reset generation for peripherals, but that's all I could find.

 

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633 次查看
Yuri
NXP Employee
NXP Employee

@K_Steinhammer 
Hello,

  SCU_PMIC_MEMC_ON "is intended as a control signal to switch on group 2 power rails, but only
for non-standard PMIC solutions, which we have not validated to date. If using our intended PMIC solution (PF8100/8200), which predominantly use I2C for control, then SCU_PMIC_MEMC_ON is effectively a don't care signal and can be left not connected."

Regards,
Yuri.

 

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634 次查看
Yuri
NXP Employee
NXP Employee

@K_Steinhammer 
Hello,

  SCU_PMIC_MEMC_ON "is intended as a control signal to switch on group 2 power rails, but only
for non-standard PMIC solutions, which we have not validated to date. If using our intended PMIC solution (PF8100/8200), which predominantly use I2C for control, then SCU_PMIC_MEMC_ON is effectively a don't care signal and can be left not connected."

Regards,
Yuri.