DRAM_SDCLK_0 and DRAM_SDCLK_1

[dqz]

about imx6 DDR3 design，there is no need to connect DRAM_SDCLK_0 and DRAM_SDCLK_1 with CK of DDR3？

iMX6 SabreSD board do not use  DRAM_SDCLK_0 and DRAM_SDCLK_1 ,but some other board use them ,i want to know what is the effect of DRAM_SDCLK_0 and DRAM_SDCLK_1? thanks

[jan_spurek]

Helo Dq,

clock always has to be provided to the DDR3 device. i.MX6 SabreSD uses DRAM_SDCLK_0 and DRAM_SDCLK_1. Could you please share the schematic from which you determined that those clocks are not used?

Best Regards,

Jan

[dqz]

[jan_spurek · Accepted solution]

Hello Dq,

these pads serve as clock access points. By default the 0R resistors are not mounted and their pads are bridged by

scratching planes.

Best Regards,

Jan