Which issue is that? I can see that the DMA_BUF_IOCTL_PHYS is necessary to actually sync the CPU cache with the DRAM (which is what DMA_BUF_IOCTL_SYNC should do, but it's broken in the NXP kernel). But what issues does the broken DMA_BUF_IOCTL_SYNC cause?
Furthermore, will this be resolved? Is this planned?