DDR3 Configuration iMx6Q

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DDR3 Configuration iMx6Q

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hemanthkumarven
Contributor II

We are working on a customized board based on iMX6Q sabre lite board. We are trying to initialize the DDR3 and unable to access it via JTAG.

We used the DDR Script Aid tool, generated script file for the MT41K256M16HA-125:E DDR3.  When we ran the DDR_Stress_Tester_V1.0.3 tool, the stress tool was able to load the code in iRAM (Internal RAM) but after that, it couldn't continue the test.

The DDR_Stress_Tester reports the error message "Failed to reopen the device". We couldnt find much documentation about this error.

Please let me know if there is any documentation or any other way to initialize or Test the DDR3 RAM.

Thanks

Hemanth

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igorpadykov
NXP Employee
NXP Employee

Hi Hemanth

I would suggest to check that JTAG_MOD is grounded.

Also jtag connections are described in Chapter 7

Configuring JTAG Tools IMX6DQ6SDLHDG

jtag scripts can be found in i.MX 6Series Platform SDK : Bare-metal SDK

folder /tools and it may be useful to try simple DDR test /tests/ddr_test.c

with checking signals with oscilloscope.

Best regards

igor

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hemanthkumarven
Contributor II

Hi Igor,

Thanks for the reply. JTAG_MOD is grounded and we are able to load the code (DDR test.c) in On chip Ram and Debug.

In the ddr_test.c, while executing "setmem32" command to the DRAM starting address (0x10000000), the execution never returns and the JTAG is unable to halt the target message is displayed if I try to pause the execution.

Whereas, the same JTAG script and the ddr_test.c works good in the sabrelite board. Based on this, can we conclude this could be a hardware issue rather than a software configuration issue?

Thanks

Hemanth

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igorpadykov
NXP Employee
NXP Employee

Hi Hemanth

yes this seems as hardware issue, one can look at

DDR signals with oscilloscope and check User Guide

Chapter 8 Avoiding Board Bring-up Problems

Best regards

igor

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hemanthkumarven
Contributor II

Hi Igor,

Thanks for the reply.

In the sabrelite board, we ran the DDR Stress tester tool V1.0.3 via USB and it ran successfully.

But, when we ran the JTAG version, we see the DDR Stress tester tool is not executing after the step where we select the DDR Frequency.

When I pause the execution, I could see the disassembly pointing to enter_self_refresh function and it never comes out of this function.

I have attached the snapshots for your reference as well. Is there any special setup requirement for JTAG version?

DDR Stress Test Serial output.pngDDR Stress Test Snapshot.png

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igorpadykov
NXP Employee
NXP Employee

Hi Hemanth

had you checked with oscilloscope DDR signals ?

What is about power lines: DDR, NVCC_DRAM, NVCC_LVDS_2P5 ?

~igor

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hemanthkumarven
Contributor II

Hi Igor,

Thanks for the quick reply. We checked the DDR3 Clock using oscilloscope and we couldnt see any output in DDR3 clock signal in our target board. We are checking the other DDR signals using Oscilloscope in our target/custom board.

In the meantime, we ran the DDR stress tool in the sabre lite and observed different behavior when using USB OTG port and JTAG port.

We would like to know if there is any setting to run the DDR stress tool properly via JTAG.

Thanks

Hemanth

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Yuri
NXP Employee
NXP Employee

  Please try to init DRAM memory via a JTAG script before DDR test running.

Regards,

Yuri.

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igorpadykov
NXP Employee
NXP Employee

Hi Hemanth

there are no special settings to run the DDR stress tool via JTAG,

compared with other programs.

Best regards

igor

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