DDR Stress Test Tool for Uboot 2020 Support

[talel_hajsalem]

Hi,

Before releasing the L5.4.24 yocto version, we were working with the sumo branch which uses Uboot 2018
And we were able to calibrate our custom RAM and generate ddr3_timing.c file that we patched our Uboot2018 with.
Now L5.4.24 is using Uboot2020 , and the DDR TEST TOOL does not support Uboot2020,
we tried to use the same generated file for Uboot 2018, but here is the error when flashing the board:

U-Boot SPL 2020.04-5.4.24-2.1.0+g4979a99 (Oct 14 2020 - 09:26:37 +0000)
power_bd71837_init
DDRINFO: start DRAM init
DDRINFO: DRAM rate 1600MTS
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Trying to boot from USB SDP
SDP: initialize...
SDP: handle requests...
Downloading file of size 1552528 to 0x40400000... done
Jumping to header at 0x40400000
Header Tag is not an IMX image
Found header at 0x404337a0
NOTICE: BL31: v2.2(release):imx_5.4.24_er3-0-gb0a00f2
NOTICE: BL31: Built : 19:34:43, Aug 6 2020
C: Error DRAM should not in Self Refresh

Even the included header file is not the same as before "asm/arch/imx8m_ddr.h"

we tried to changed to "asm/arch-imx8m/ddr.h" but same error.

Is DDR TEST TOOL FOR IMX8M gonna support Uboot 2020?
Or how can we do it? Because, for now, we are using the L5.4.24 release with Uboot 2018.

Thanks, Talel

[don_gunn]

Also the proper way to address the header file in the timing file should be changed from "asm/arch/imx8m_ddr.h" to "asm/arch/ddr.h "

Don

[talel_hajsalem]

Hi don,

I checked Uboot2020 include files and there is no "asm/arch/imx8m_ddr.h" :

There is a directory for arch-imx8m containing a ddr.h header file:

→ pwd
/media/talel/data/u2020/menzu/tmp/work/menzu-poky-linux/u-boot-imx/1_2020.04-r0/git/arch/arm/include/asm

→ ll | grep arch
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-am33xx/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-armada100/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-armada8k/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-armv7/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-aspeed/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-bcm235xx/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-bcm281xx/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-bcmcygnus/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-bcmnsp/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-ep93xx/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-fsl-layerscape/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-hi3660/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-hi3798cv200/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-hi6220/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-imx/
drwxr-xr-x 3 talel talel 4.0K نوف  6 15:39 arch-imx8/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-imx8m/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-imxrt/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-lpc32xx/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-ls102xa/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-mediatek/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-meson/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-mvebu/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-mx25/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-mx27/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-mx31/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-mx35/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-mx5/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-mx6/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-mx7/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-mx7ulp/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-mxs/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-omap3/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-omap4/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-omap5/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-orion5x/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-owl/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-px30/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-pxa/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-rk3036/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-rk3128/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-rk3188/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-rk322x/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-rk3288/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-rk3308/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-rk3328/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-rk3368/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-rk3399/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-rockchip/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-rv1108/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-s32v234/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-sa1100/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-spear/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-stih410/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-stm32/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-stm32f4/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-stm32f7/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-stm32h7/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-stv0991/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-sunxi/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-tegra/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-tegra114/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-tegra124/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-tegra186/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-tegra20/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-tegra210/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-tegra30/
drwxr-xr-x 2 talel talel 4.0K نوف  6 15:39 arch-vf610/

→ ll arch-imx8m/ | grep ddr
-rw-r--r-- 1 talel talel  28K نوف  6 15:39 ddr.h
-rw-r--r-- 1 talel talel 2.4K نوف  6 15:39 lpddr4_define.h

Can you help more with this.

Can you tell me exactly what you did to solve the problem ?

Thanks, Talel

[don_gunn]

Talel, I have gotten my problem fixed.  Looking back at your post again I can see that u-boot is properly calibrating the memory.  The message from u-boot saying "DDRINFO: ddrphy callibration done" means that the memory is working.

the error message about "DDR should not be in self refresh" is normal and I get the same thing on my board running DDR4 on an MX8M Mini as well as the MX8MNano DDR4 Eval kit.

Looking at your-u-boot console it looks like you are using uuu to program the board.  It looks like U-boot has loaded and initialized the memory, but you are getting stuck in the programming phase.  Are you using a custom programming script with UUU or are you using the build in macros?  I would suggest that you confirm that fastboot has been properly enabled in your u-boot image as well as the USB interface.  If those are configured properly then I would take a closer look at the programming script.

[talel_hajsalem]

Hi don,

Thanks for the reply, I'm actually using "uuu" from the official NXP github mfgtools repo https://github.com/NXPmicro/mfgtools

I never faced a problem before flashing the eMMC, I'm actually working on 5.4.24 release but with Uboot2018.

[don_gunn]

I am having a similar issue with trying to get DDR4 timing for kernel 5.4.24.  Generated timing does not work in u-boot 2020.04 but the stress test passes no problem.

[talel_hajsalem]

Any updates ?