Current ratings of LDOs inside imx6

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Current ratings of LDOs inside imx6

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muratünal
Contributor I

Hi,

I started to design a board which include imx6. There are LDOs inside the processor that I saw in reference manuel. (LDO_PU, LDO_ARM, LDO_SoC, LDO_2P5, LDO_1P1, LDO_SNVS, LDO_USB) What are current ratings of these LDOs? (especially LDO_SoC and LDO_2P5) Is there any documents about current ratings?

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Yuri
NXP TechSupport
NXP TechSupport

"Below are considerations regarding LDOs of the i.MX 6 processor:

LDO_ARM     Adjustable    -

LDO_SOC     Adjustable    -

LDO_PU       Adjustable    -

LDO_SNVS   1.1V          -

LDO_USB     3.0V        50mA

LDO_1P1     1.1V        150mA

LDO_2V5     2.5V        350mA

  The following regulators should not be used to supply any external loads:

LDO_ARM, LDO_SOC, and LDO_PU. They are meant to be adjustable so that the

necessary voltage to supply internal loads can change with frequency. In addition,

LDO_SNVS should not be used since it could potentially draw power directly from

an attached coin cell, or a limited, always on, voltage source. This is why the

current capabilities of these LDOs are specifically not listed.

  LDO_USB can be used for external loads, but the internal load may be up to 30mA

when USB is used in the Full Speed mode. Even if a High Speed device is attached,

Full Speed must be used first to negotiate to go to High Speed. Effectively, LDO_USB

is not available.

   This leaves LDO_1P1 and LDO_2V5. Both of these can be used to supply external loads

if the customer desires. LDO_1P1 may be able to supply 70 – 100mA externally in a normal

application and LDO_2V5 may be able to supply 200 – 250mA externally in a normal application.

These are not tested values and are only estimates.

  Other considerations are:

-    These LDOs would normally be powered on in low power states. Definitely any state that would
     require a wake up from USB. So the customer would lose the opportunity to easily power down an
     attached device for power savings, if desired.

-    The internal LDOs regulate voltage effectively by dissipating the excess voltage off as heat (very simplistic
     view, but makes the point). The chip is very powerful and may run very hot in extreme applications.
     Drawing more current through internal LDOs will only add to the heat generated internally. Customer needs
     to make sure that thermal considerations will not be a problem.

Bottom line is that it is not really recommended, but there is no technically reason that it can’t be done

(other than what is discussed above)."

Have a great day,
Yuri

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1226230646
Contributor I

Hi Kanou

     I got a new problem about VDD_SNVS. I use i.MX Pins Tool v4.1 to set pins,about “Power group” ,the VDD_SNVS_CAP Recommended voltage range is{2.8-3.3} .But ,in fact,as you said LDO_SNVS  is 1.1V(I check my bord is 0.99V).So,my question is :Why is the reference value exceed the actual value so much.What is wrong!pastedImage_1.png

                                                                                             Fig 1

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kanoumamoru
Contributor III

Hi Yuri,

VDDSOC_IN is devided to 2 path LDO_PU and LDO_SOC.

i.e. LDO_PU is used for GPU and VPU, LDO_SOC is used for internal SOC, HDMI_VP, SATA_VP, PCIE_VP,

and PCIEVPTX.

I want to know the max current ratio of LDO_PU and LDO_SOC because we can't mesure each internal current.

In my feeling I guess that

LDO_PU vs. LDO_SOC is  8:2.

Please let me know if you have any informations and comments.

Its information help our PCB power-rail pattern (mainly line-width) design.

Kanou

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