Could not debug my new custom board

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Could not debug my new custom board

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fma23
Contributor II

I am trying to debug my code using my new custom board that has iMX RT1062 MCU on it and a 16 MB flash on it: IS25LP128F-JBLE. 

I verified that my boot configuration is correct. I set it internal boot. However, when I run my debugger, I get the error below:

Break at address "0xdeadbeee" with no debug information available, or outside of program code.

I am using Segger debugger. Can any one tell  me what this error is all about?

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fma23
Contributor II

What I am trying to do is that I want to program my board so that I can boot from an external flash using QSPI (part number: IS25LP128F.)

The board is configured to run QSPI, but when I use Segger Jtag to debug the code this is what I get in deassembly:

......... ...
00217398:   lsls    r0, r0, #14
0021739a:   bpl.n   0x2173a4
0021739c:   ldr     r0, [r7, #0]
0021739e:   tst.w   r0, #2147483648 ; 0x80000000
002173a2:   bpl.n   0x217396
002173a4:   ldr     r0, [r6, #0]
002173a6:   lsls    r0, r0, #27
002173a8:   bmi.n   0x2173dc
002173aa:   bl      0x21aa3c
002173ae:   cbz     r0, 0x2173dc
002173b0:   ldr     r0, [r4, #0]
002173b2:   movw    r2, #57054      ; 0xdede
002173b6:   ldr     r1, [r4, #4]
002173b8:   adds    r0, r0, r2
002173ba:   str     r0, [r4, #0]
002173bc:   adc.w   r1, r1, #0
002173c0:   str     r1, [r4, #4]
002173c2:   bl      0x21a5a0
002173c6:   ldr     r0, [r4, #0]
002173c8:   movw    r2, #8482       ; 0x2122
002173cc:   ldr     r1, [r4, #4]
002173ce:   movt    r2, #65535      ; 0xffff
002173d2:   adds    r2, r0, r2
002173d4:   str     r2, [r4, #0]
002173d6:   adc.w   r0, r1, #4294967295
002173da:   str     r0, [r4, #4]
002173dc:   bl      0x20d102
002173e0:   cmp     r0, #0
002173e2:   beq.n   0x217396
002173e4:   ldr     r0, [r4, #0]
002173e6:   movw    r2, #57054      ; 0xdede
002173ea:   ldr     r1, [r4, #4]
002173ec:   adds    r2, r0, r2
002173ee:   str     r2, [r4, #0]
002173f0:   adc.w   r0, r1, #0
002173f4:   str     r0, [r4, #4]
002173f6:   bl      0x21a5b8
002173fa:   ldr     r0, [r4, #0]
002173fc:   movw    r1, #8482       ; 0x2122
00217400:   ldr     r2, [r4, #4]
00217402:   movt    r1, #65535      ; 0xffff
00217406:   adds    r1, r0, r1
00217408:   str     r1, [r4, #0]
0021740a:   adc.w   r0, r2, #4294967295
0021740e:   str     r0, [r4, #4]
00217410:   b.n     0x217396
00217412:   stmdb   sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
00217416:   movw    r1, #32800      ; 0x8020
0021741a:   movt    r1, #16399      ; 0x400f
0021741e:   ldr     r6, [r1, #0]
00217420:   str     r6, [sp, #0]
00217422:   mov.w   r9, #0
......... ...

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Farid Mabrouk,

  Thank you for your interest in the NXP MIMXRT product, I would like to provide service for you.

  Please use the JLINK commander to connect your customer MIMXRT1052 board, can you find the ARM Cortex-M7 core?

  When you use the debugger, do you enable the QE bit?

   If you can find the ARM core, I suggest you use the MCUBootUtility tool to conect your board in the serial download mode through the UART or the USB HID.

The MCUBootutility download link:

https://github.com/JayHeng/NXP-MCUBootUtility/releases/tag/v2.0.0
the related user manual is:
https://github.com/JayHeng/NXP-MCUBootUtility

  After you test, you also can share your JLINK commander connect result, you also can tell me when you use the debugger, what's the IDE you are using?

Have a great day,
Kerry

 

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farid_mabrouk
Contributor II

Hi 

I used Segger jlink commander, and I was able to connect, and found the ARM core. Thus I don’t think the issue is the jtag, but rather a configuration issue. I’m using a 16MB flash. 
 
Do I need to have the reset and write enable pulled up high? I noticed these signals on iMX RT1060-evk development board are not pulled up high. How about config1 and config2, what should the values be? Config1 in my case is set to 1, config2 is set to 0x07; boot0 is low and boot1 is high. 
How do you Enable the QE bit? I read that Segger jtag is configured by default to run in QSPI. 
I’m using MCU expresso; and I’m using the GPIO example code to rest my board. 
Thank you, 
Farid 
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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Andre marcus,

  Thanks for your updated information.

  Please run this SDK code from the RAM with your JLINK debugger:

SDK_2.6.2_EVK-MIMXRT1060\boards\evkmimxrt1060\driver_examples\flexspi\nor\polling_transfer

  Please check can you do the external qspi flash erase, write and read operation.

  This code already contains the QE enable code.

   If this code can't do the flash operation, it means your hardware side still have problems, especially about the flash circuit.

  About the BOOT_CFG and BOOT_MODE configuration.

 All BOOT_CFG can be configured to 0, BOOT_MODE can be configured to the internal boot mode, BOOT_MODE[1:0]=10.

  BTW, do you also try the MCUBootUtility tool in the serial download mode, whether that tool can find the flash or not? That tool can help you enable the QE automatically.

  Please try it again.

Any updated information, please kindly let me know.

Have a great day,
Kerry

 

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farid_mabrouk
Contributor II

Im using this flash IS25LP128, by the way. Please comment on the pull up resistors for reset and write enable pins. Do I need pull up resistors or not. 

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Andre marcus,

    IS25LP128 circuit should be the same as IS25WP064AJBLE, but just IS25LP128  is 3V power.

    About the pull up resistor for reset, do you mean the RT RESET pin? You can refer to the MIMXRT1060-EVK board circuit.

  

Have a great day,
Kerry

 

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