Hello,
We have some trouble to connect an Imx6-ul (MCIMX6G2AVM) with a KSZ8863RLL (ethernet switch). For our use case we would like the ethernet switch to be configured as standalone. The two ICs are connected throught RMII interface without MDC/MDIO management interface, the clock is generated by the KSZ8863RLL. On imx6.UL side the ENET2 is used.
The base DTS is linux-2.6-imx/imx6ul-var-dart.dtsi at imx-rel_imx_4.1.15_1.1.0_ga-var02 · varigit/linux-2.6-imx · Gi...
The DTS is modified as following
&fec1 {
status = "disabled";
};
&fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2>;
phy-mode = "rmii";
status = "okay";
fixed-link {
speed = <100>;
full-duplex;
};
};
We are unable to find the correct values to modify pinctrl_enet2: enet2grp to correctly setup the clock settings (ENET2_TX_CLK as input) and clear bit 18 of GPR1 according documentation.
We are thinking that the problem is related to the value of MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2, but we are not able to find where the value is described in documentation. At the other side we are found bit 18 of GPR1 to be cleared to enable ENET2_TX_CLK as input but we are unable to find the link with DTS
any advise would be appreciated
Thank you
Hi Cyril
one can try to add settings to uboot-imx/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c:
uboot-imx/mx6ul_14x14_evk.c at imx_v2015.04_4.1.15_1.1.0_ga_var01 · varigit/uboot-imx · GitHub
Best regards
igor
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Hello,
Thank-you for your help, with your help I have managed to find the linux pendant of this file (mach-imx6ul.c) to configure GPR1, for disabling clock generation and select ENET2_TX_CLK as input clock.
In the file imx6q-iomuxc-gpr.h, mask and bits for clock source selection are not defined, I will try to make a merge request to add them.
Best regards,
Cyril