Configuring i.MX6 as endpoint memory device

[haider]

Hello,

I am new to pcie and imx6.

I am trying to configure configure BD-SL-i.MX6 as endpoint memory device. I have gone through the i.MX6Q PCIe EP/RC Validation System.

In this patch  bars are setup under the imx_pcie_regions_setup() but I could not locate any inbound setup in case root complex tried to access the ep memory. Is that required?.

It also did not allocate memory space from the ram to these memory space. Please let me know if I am missing any thing.

Also can we map more than the 16mb space?. Like I want to configure endpoint whole ram accessible to root complex.

Thanks,

Haider

[jamesbone]

Please check the attached patch and following test steps.

Test steps and results:

First of all, Enable CONFIG_PCI_MSI=y, and rebuild the image

Then,

EP side(console command and kernel message):

root@sabresd_6dq:/ # memtool 1ff8000=1
Writing 32-bit value 0x1 to address 0x01FF8000
root@sabresd_6dq:/ #

|
|
\/

RC side(console command and kernel message):

root@sabresd_6dq:/ #
Test for MSI interrupt - handle_simple_irq triggered by irq: 497

root@sabresd_6dq:/ # cat /proc/interrupts | grep MSI
497:          1          0          0          0  PCIe-MSI
root@sabresd_6dq:/ #

|
|
\/

EP side(console command and kernel message):

root@sabresd_6dq:/ # memtool 1ff8000=1
Writing 32-bit value 0x1 to address 0x01FF8000

|
|
\/

RC side(console command and kernel message):

root@sabresd_6dq:/ #
Test for MSI interrupt - handle_simple_irq triggered by irq: 497

root@sabresd_6dq:/ # cat /proc/interrupts | grep MSI
497:          2          0          0          0  PCIe-MSI
root@sabresd_6dq:/ #

Have a great day,
Jaime

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[haider]

thanks,

Can you please briefly explain or point me in the right direction to understand the dbi interface, how can I access from my firmware. Apparently I failed to locate that info in reference manual.

Regards,

Haider