Configuring ESAI1 as I2S Master with specific clock rates on iMX8QM

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Configuring ESAI1 as I2S Master with specific clock rates on iMX8QM

637 Views
Contributor I

I have been trying to bring up ESAI1 on iMX8QM platform for quite some time and could not seem to find or get any progressive information regarding that. I have connected a DSP board to I2S input of ESAI1 peripheral on iMX8QM, and would like to configure ESAI1 as I2S Master with 3.72MHz Bit Clock (BCK) and 48 kHz (32 bit frame, 24 bit data) on Word Sync (WS). I am working on 4.14.62 and connected DSP board to the following pins:

                           SC_P_ESAI1_SCKR_AUD_ESAI1_SCKR <---------------------- WS
(iMX8QMMEK)  SC_P_ESAI1_TX5_RX0_AUD_ESAI1_TX5_RX0 <------------- DATA       (Board with I2S Out)

                           SC_P_ESAI1_FSR_AUD_ESAI1_FSR <--------------------------- BCK

Following is what I have currently:

fsl-imx8qm-device.dtsi
----------------------------------------------------

esai1: esai@59810000 {
    compatible = "fsl,imx8qm-esai";
    reg = <0x0 0x59810000 0x0 0x10000>;
    interrupts = <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>;
    clocks = <&clk IMX8QM_AUD_ESAI_1_IPG>,
        <&clk IMX8QM_AUD_ESAI_1_EXTAL_IPG>,
        <&clk IMX8QM_AUD_ESAI_1_IPG>,
        <&clk IMX8QM_CLK_DUMMY>;
    clock-names = "core", "extal", "fsys", "spba";
    dmas = <&edma3 6 0 1>, <&edma3 7 0 0>;
    dma-names = "rx", "tx";
    status = "disabled";
    power-domains = <&pd_esai1>;
};

&esai1 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_esai1>;
    assigned-clocks = <&clk IMX8QM_ACM_ESAI1_MCLK_SEL>,
            <&clk IMX8QM_AUD_PLL0_DIV>,
            <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
            <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>,
            <&clk IMX8QM_AUD_ESAI_1_EXTAL_IPG>;
    assigned-clock-parents = <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>;
    assigned-clock-rates = <0>, <786432000>, <49152000>, <24576000>, <49152000>;
    fsl,txm-rxs;
    status = "okay";
};

fsl-imx8qm-mek.dtsi
----------------------------------------------------

pinctrl_esai1: esai1grp {
                fsl,pins = <
                    SC_P_ESAI1_FSR_AUD_ESAI1_FSR        0xc6000040
                    SC_P_ESAI1_FST_AUD_ESAI1_FST        0xc6000040
                    SC_P_ESAI1_SCKR_AUD_ESAI1_SCKR        0xc6000040
                    SC_P_ESAI1_SCKT_AUD_ESAI1_SCKT        0xc6000040
                    SC_P_ESAI1_TX0_AUD_ESAI1_TX0        0xc6000040
                    SC_P_ESAI1_TX1_AUD_ESAI1_TX1        0xc6000040
                    SC_P_ESAI1_TX2_RX3_AUD_ESAI1_TX2_RX3    0xc6000040
                    SC_P_ESAI1_TX3_RX2_AUD_ESAI1_TX3_RX2    0xc6000040
                    /*SC_P_ESAI1_TX4_RX1_AUD_ESAI1_TX4_RX1    0xc6000040*/ /* ??? Used already by another pin in board*/
                    SC_P_ESAI1_TX5_RX0_AUD_ESAI1_TX5_RX0    0xc6000040
                >;
            };

I would sincerely appreciate if someone from the community could explain how this peripheral  can be configured as I2S Master. There is already a driver existent fsl_esai.c, but there is no information on how this could be used for I2S Master configuration with specific clock rates and bit lengths... (I already have looked at ENHANCED SERIAL AUDIO INTERFACE (ESAI) Programming and Interfacing Techniques Application Note, there are some register configurations given, but there is no information how this could be done in the using the existent driver fsl_esai.c, Without re-inventing the wheel... )

I would really if anybody with prior experience could give me ideas how this could be done.

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Contributor II

You can probably look at fsl_esai_set_dai_sysclk function in fsl_esai.c. It has the direction of the clocks passed as the parameter, and is responsible to set their frequencies as well.

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NXP TechSupport
NXP TechSupport

Hi Mustafa

SCKR is a bidirectional pin providing the receivers serial bit clock for the ESAI
interface. So DSP Bit Clock (BCK) should be connected to ESAI1_SCKR and
ESAI1_FSR to DSP WS. ESAI signals description (module is the same as in i.MX6Q)
can be found for example in i.MX 6Dual/6Quad Applications Processor Reference Manual
Also when clocks provided from external codec to ESAI this is called "slave" mode.
i.MX8QM ESAI slave receiver configuration is defined by dts property "fsl,txm-rxs;" as in
fsl-imx8qm-mek.dtsi example:

&esai0 {
    compatible = "fsl,imx8qm-esai";
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_esai0>;
    assigned-clocks = <&clk IMX8QM_ACM_ESAI0_MCLK_SEL>,
            <&clk IMX8QM_AUD_PLL0_DIV>,
            <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
            <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>,
            <&clk IMX8QM_AUD_ESAI_0_EXTAL_IPG>;
    assigned-clock-parents = <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>;
    assigned-clock-rates = <0>, <786432000>, <49152000>, <12288000>, <49152000>;
    fsl,txm-rxs;
    status = "okay";
};

fsl-imx8qm-mek.dtsi\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel 

There is no clock tree for the i.MX8QM, System Control Unit (SCU) controls processor
resources, there are various clock slices that come off the PLLs that are contained in the
clocks subsystem of a particular module.
One can look at descriptions of "SC_PM_CLK_" in sect.13.4 (SVC) Power Management Service
System Controller Firmware API Reference Guide i.MX8QM sc_fw_api_qm_b0.pdf
inclided in SCFW Porting Kit

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
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26 Views
Contributor I

I think I misspoken. I would like imx to provide clocks, not the dsp module. So I think I had a mistake in txm-rxs there, it will be other way around. What do I need to do to set the clocks myself from devicetree? Just follow that PDF?

Thanks

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NXP TechSupport
NXP TechSupport

for providing clocks from i.mx side "fsl,txs-rxm" should be used, one can look at esai driver sources:

fsl_esai.c\fsl\soc\sound - linux-imx - i.MX Linux kernel 

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Contributor I

Hi igorpadykov‌,

I just checked the connections and it seems I made a mistake when writing in the question,
So I have,

                           SC_P_ESAI1_SCKR_AUD_ESAI1_SCKR <---------------------- BCK
(iMX8QMMEK)  SC_P_ESAI1_TX5_RX0_AUD_ESAI1_TX5_RX0 <------------- DATA       (Board with I2S Out)

                           SC_P_ESAI1_FSR_AUD_ESAI1_FSR <--------------------------- WS

at the moment and I entered fsl,txs-rxm; instead of fsl,txm-rxs; in the esai1 devicetree.

&esai1 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_esai1>;
    assigned-clocks = <&clk IMX8QM_ACM_ESAI1_MCLK_SEL>,
            <&clk IMX8QM_AUD_PLL0_DIV>,
            <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
            <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>,
            <&clk IMX8QM_AUD_ESAI_1_EXTAL_IPG>;
    assigned-clock-parents = <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>;
    assigned-clock-rates = <0>, <786432000>, <49152000>, <24576000>, <49152000>;
    fsl,txs-rxm;
    status = "okay";
};

However, I am unable to see any movement in the BCK pin still. What do you think I should try next. Thanks.

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NXP TechSupport
NXP TechSupport

Hi Mustafa

one can look on some basic tests

doc\mxc_esai_test\test - imx-test - i.MX Driver Test Application Software 

Best regards
igor

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26 Views
Contributor I

Hi, I think I am far from those tests. First I need ESAI being properly configured so that it provides clock to BCK, then comes the devicetree modifications so that ALSA recognises the DSP as a sound card. Then I can do those tests.
Could you please redirect me to someone with prior knowledge of this? Additional devicetree is as follows: simple-card.c gives error at parse_cpu and parse_codec. Regardless of that I would expect BCK pin to be clocked since I have set it to be rx-master.

sound-dsp-module {

                compatible = "simple-audio-card";
                simple-audio-card,name = "DSP_Module";
                simple-audio-card,format = "i2s";
                simple-audio-card,bitclock-master = <&dailink_master>;
                simple-audio-card,frame-master = <&dailink_master>;
                status = "okay";

                dailink_master: simple-audio-card,codec {
                        sound-dai = <&codec_test>;
                };

                dailink_cpu: simple-audio-card,cpu {
                        sound-dai = <&esai1>;
                        system-clock-frequency = <1536000>;
                };

        };

       codec_test: codec_test {
            compatible = "linux,snd-soc-dummy";
            #sound-dai-cells = <0>;
            status="okay";
        };

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NXP TechSupport
NXP TechSupport

sorry, this part is not fully supported as it is "PREPRODUCTION" part

as shown below in red:

i.MX 8 Family Applications Processor | Arm Cortex-A53/A72/M4 | NXP 

Full support may be provided using NXP Professional Services | NXP 

Best regards
igor

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