Hello,
Unfortunately, it could be possible, but it will not be an easy task.
If you go to the MU part of the reference manual, you can find that there is a flag that changes the state when the transmission between cores is finished. You will need to create a code in the M4 cortex that could detect when the flag changed.
The name of the register is Processor x Status Register (MUx_ASR).
However, in the code, you will need to play with the timers and interrupts to handle this operation. Unfortunately, this is out of our scope.
I apologize for the inconvenience this may give you.
Best regards,
Diego.
