Common Ethernet RMII designfor I.MX6UL, Dual and QuadPlus

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Common Ethernet RMII designfor I.MX6UL, Dual and QuadPlus

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christopheniclaes
Contributor I

I'm designing a CPU module that must fit on a custom motherboard. This motherbqrd can be used with several types of CPU modules with either IMX6UL, IMX6Dual/Quad or IMX6DualPlus/QuadPlus.

My concern is about having a common design for all CPUs regarding the reference clock of the Ethernet port.

1. On my IMX6UL CPU Module, I use a design very close to the EVK. The ENET1 interface is configured as RMII and ENET1_TX_CLK is an output going to the PHY licated on my motherboard.

2. How can I do that for IMX6Dual/Quad ? It seams that ENET_TX_CLK and ENET_RX_CLK are always inputs and are not used in RMII mode. Another signal, ENET_REF_CLK, is also an input. There is an internal REFCLK generator in the clocking module but how to use it? I would lije this generator to provide the clock to the IMX6's MAC and to my PHY on the motherboard.

3. I want my IMX6Dual/Quad module to be able to host an IMXDualPlus/QuadPlus on the same PCB. It seams that there is a difference with the Plus version: ENET_TXCLK_SEL bit in IOMUXC_GPR5. What's the impact. How to have a design tha fits all CPUs?

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art
NXP Employee
NXP Employee

Please refer to the Chapter 10 "Using the RMII Interface", especially, to the Section 10.4.1 "Using the GPIO_16 pin to generate the reference clock", of the "Hardware Development Guide for i.MX 6QuadPlus, 6Quad, 6DualPlus, 6Dual, 6DualLite, 6Solo Families of Applications Processors" document, available, for example, on the i.MX6Quad processor's Documentation web page:

https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-appl...

The clocking scheme, described there, seems to be most appropriate for your case.

The same scheme can be used for i.MX6DualPlus/QuadPlus without any change in RMII mode.


Have a great day,
Artur

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art
NXP Employee
NXP Employee

Please refer to the Chapter 10 "Using the RMII Interface", especially, to the Section 10.4.1 "Using the GPIO_16 pin to generate the reference clock", of the "Hardware Development Guide for i.MX 6QuadPlus, 6Quad, 6DualPlus, 6Dual, 6DualLite, 6Solo Families of Applications Processors" document, available, for example, on the i.MX6Quad processor's Documentation web page:

https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-appl...

The clocking scheme, described there, seems to be most appropriate for your case.

The same scheme can be used for i.MX6DualPlus/QuadPlus without any change in RMII mode.


Have a great day,
Artur

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Note:
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- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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christopheniclaes
Contributor I

Thanks!

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