Checking Clock's configuration of IMX28

[alexisfuentes]

Hello everyone,

We are developing an application where we need to know well how the clock's should be configured in IMX28 processor.

We have checked the Clock's diagram and we don't know how the " System PLL0, Multi-Output PLL" is configured or how configure it. 

Our main question is: what is the value before each "ICG-PHASE DIV", and what is the output value of each output (ref_cpu,ref_emi,etc).

Could someone help us?

Thank you.

[igorpadykov]

Hi Alexis

PLL0 is 480 MHz, as described in sect.10.8.1 System PLL0,

System/USB0 PLL Control Register 0 (HW_CLKCTRL_PLL0CTRL0) i.MX28 RM.

Examples of PLL configurations can be found in i.MX28 obds

Lab and Test Software (1)

"IMX_OBDS  : On-Board Diagnostic Suit for the i.MX28"

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MCIMX28EVKJ&fpsp=1&tab=Design_Tools_T...

Best regards

igor

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[alexisfuentes]

Hi Igor,

Thank you for your reply, but we have already checked these sections and we haven't resolved our doubts. We still unknowing the behaviour inside  the "System PLL0, Multi-Output PLL" and what value have the outputs ref_cpu, ref_emi, etc..

Thanks for everithing.