Cannot disable pull-down on i.MX 8M Mini GPIO

[lecejeff]

Hi,

We are working with the i.MX 8M Mini processor implemented on DART-MX8M-MINI SoM on our custom CarrierBoard.

We are using GPIO5_IO03 as an input (+3.3V domain). This input is driven by an open-drain transistor with a pull-up resistor to +3.3V. There shall be no pull-down resistor in the signal path.

However, when I expect to read +3.3V on the input, I am reading ~ 2.5V. I suspect there is a pull-down in the input path creating a voltage divider.

I confirmed with Variscite (DART-MX8M-MINI manuf), and there are no pull-down on their SoM.

I have triple checked the register values for the IOMUX configuration for GPIO5_IO03 using memtool. They're as follow :

Pad mux : 0x1E8 -> 0x00000005 -> SPDIF_TX set to GPIO5_IO03

Pad control 0x450 -> 0x00000014 -> Disable pull resistors, Fast SR, X2 drive strength

See the attached picture for reference....

I suspect there is a pull-down of ~ 33kOhm somewhere. Our pull-up being 10kOhm, that sets the input voltage to ~ 2.5V

I tried changing the pull-up value to 2kOhm, and that increased the input voltage to ~3.11V.

So I am pretty sure there is a pull-down somewhere here, but I don't know where, nor how I can disable it.

I have seen the exact same behavior on GPIO1_IO12...

Thanks for your advice and have a great day!

[Sanket_Parekh]

Hi @lecejeff 

I have tested the same on my set-up and issue was reproduced. I am discussing this problem with engineering team. As soon as i receive response from my team, I will let you know.

Thanks & Regards

Sanket Parekh

[Sanket_Parekh]

Hi @lecejeff 

I hope you are doing well.

Can you please share the schematic portion of input is driven by an open-drain transistor with a pull-up resistor to +3.3V?

Thanks & Regards

Sanket Parekh

[lecejeff]

Hi Sanket,

Sure, find attached the open-drain output driver with pull-up and associated input to the SoM.

The PWG# output comes from a TPS24701 (ideal diode controller) IC.

The DISPLAY_PWR_FLTn signal goes directly to GPIO1_IO12 of the i.MX 8M Mini :

Measuring the DISPLAY_PWR_FLTn at ~ 2.5Vcc right now, thus that would mean a pull-down of ~ 33k is present between DISPLAY_PWR_FLTn and GND.

I changed the pull-up value to ~2kOhm and the DISPLAY_PWR_FLTn signal measures ~ 3.11Vcc

About GPIO5_IO03, the open drain output is driven by a cellular modem :

This also goes directly to the SoM input : 

Let me know if you need anything else. Both inputs exhibit the same behavior.

Regards,

Jean-François Bilodeau, Ing.

[Sanket_Parekh]

Hi @lecejeff 

Please accept my apologies for delayed response.

Have you done the test by disconnecting the external device than test the input voltage? If this situation the input voltage is 3.3v?

Thanks & Regards

Sanket Parekh

[lecejeff]

Hi Sanket,

No I did not disconnect the external device, as that is not a viable use case in my application.

I have done additional tests on my end and have got interesting result.

I did setup the GPIO1_IO12 to ~ 0x00000014 -> IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO12 at address 330302C0h

When I read the content of this register once linux has booted, I do read back 0x00000014 (No Pull resistor enabled). However the voltage on the pin reads ~ 2.5V, so there seems to be an internal pull-down still enabled.

What I tried is overwriting the IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO12 to the same value of 0x00000014 using memtool.
./memtool -32 330302C0=00000014

That worked, the voltage readout on the GPIO1_IO12 is now 3.3V instead of 2.5V

I don't know if there is a proper "sequence" for the writing of the IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO12 register...

The 1st read seemed to indicate it was at the proper value. Overwriting to 00000014h worked.
Can you try it on your side?

Thanks,
Jean-François Bilodeau, Eng.

[Sanket_Parekh]

Hi @lecejeff 

Is the voltage of NVCC_GPIO1 connected to 3.3v?

Thanks & Regards

Sanket Parekh

[lecejeff]

Hi @Sanket_Parekh 

Yes it is. It is done on the SoM, I have just confirmed with Variscite.

Thanks, 

Jean-François Bilodeau, Eng.

[Sanket_Parekh]

 @lecejeff 

Please accept my apologies for delayed response.

Did you set GPIO_DR to 0 to gpio input?

Thanks & Regards

Sanket Parekh

[lecejeff]

Hi @Sanket_Parekh ,

Yes GPIO_DR is set to input. Please note that we have many other signals configured as inputs that works just fine, and many output signals that also works just fine.

If you have been able to reproduce this problem, why does the state of GPIO_DR matter?

[Sanket_Parekh]

Hi @lecejeff 

Pull down can't be disabled. Please see below link:

Solved: i.MX8M processor pins pull-up /down configuration - NXP Community

Last reply, suggested the test But only for test, we need to exclude the impact of external device for the gpio, Please cut the wire as mentioned in attachment.

Thanks & Regards

Sanket Parekh

[lecejeff]

Hi @Sanket_Parekh ,

Thanks for your response and sorry for my late reply.

Is this information explicitely written anywhere "Pull down can't be disabled. The pull down is described as “always on 90k pd res”" ?? I did not encouter such advice in the datasheet, reference manual of hardware reference guide for the i.MX 8M Mini.

The problem you mention is from an i.MX 8M. Is it also applicable to i.MX 8M Mini?

You mention that the pull down is always on.

Please see the attached image of the behavior of the GPIO5_IO03 (CELL_STATUSn) that I have probed on the scope. Please note that this GPIO is mapped to a linux driver and is properly instanciated in the device tree as an input without pull resistors (no PU, no PD, PE = 0

There are 2x phases : the GPIO state when linux is booting, and the final state once the drivers have been loaded. If the pull-down is "always on", can you please explain why the voltage pops from ~2.5V to ~3.3V when the system has finished booting?

FYI, the GPIO5_IO03 is driven by an open-drain output with a +3.3V pull-up of 10kOhm :

Thanks for your time and waiting for more details on your side.

Jean-François Bilodeau, Eng.

[Sanket_Parekh]

Hi @lecejeff 

The problem you mention is from an i.MX 8M. Is it also applicable to i.MX 8M Mini?

>> No, 8mm gpio is different with 8mq.  

Is this information explicitly written anywhere "Pull down can't be disabled. The pull down is described as “always on 90k pd res”" ??

>>Please see the 8mq schematic.

There are 2x phases : the GPIO state when linux is booting, and the final state once the drivers have been loaded. If the pull-down is "always on", can you please explain why the voltage pops from ~2.5V to ~3.3V when the system has finished booting?

>>For 8mm gpio, there was also some caution, please check the below in the schematic.

Thanks & Regards

Sanket Parekh

[lecejeff]

Hi @Sanket_Parekh , any updates on this topic ?

Thanks and have a great day!

Jean-François Bilodeau, Eng.

[Sanket_Parekh]

@lecejeff I am waiting for the response from Engineering team.