Can't access EIM address space

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Can't access EIM address space

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dank1
Contributor II

Hello,

 

Whenever I try to access the EIM address space I get an error.

 

I setup the CS0 to full 128MB EIM address space and then I try to read the 0x08000000 address.

 

I get an error:

 

-> d 0x08000000

NOTE: memory values are displayed in hexadecimal.

0x08000000:

 

Data aborttrcStack aborted: error in top frame

 

Exception address: 0x101ef89c

Current Processor Status Register: 0x60000013

 

Shell task 'tShell0' restarted...

 

Attached is the full log.

 

I have also tried setting up CS0 and CS1 each at 64MB and same problem.

I have also tried setting up CS0, CS1, CS2, CS3 32MB and same problem.

Original Attachment has been moved to: log.txt.zip

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RobbieJiang
Contributor IV

Hi Dan,

Are you trying to access EIM in U-boot or kernel?

I have managed to access EIM NOR flash from both U-boot and Linux kernel on MX6Q sabrelite based board.

Please refer to my post:

About support EIM parallel NOR flash in u-boot

Robbie

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Yuri
NXP Employee
NXP Employee

  Perhaps the problem concerns to the fact, that EIM clocks should be enabled for EIM
registers access. Please allow  all clocks ("Clock is on during all modes, except STOP mode",
at least for testing)  via CCM Clock Gating Registers  (CCM_CCGRx, x =0..6).


Have a great day,
Yuri

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dank1
Contributor II

I checked and eim_slow_clk_enable (CCM_CCGR6[11:10]) is '11' as required.

-> d 0x20c4068,20,4

NOTE: memory values are displayed in hexadecimal.

0x020c4060:                    ffffffff ffffffff  *            ....*

0x020c4070:  fc3fffff ffffffff ffffffff ffffffff  *..?.............*

0x020c4080:  ffffffff ffffffff 7fffffff

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Yuri
NXP Employee
NXP Employee

  Please use examples in the Reference Manual :

section 22.6 (Initialization Information) of IMX6DQRM (Rev 2, 06/2014).

~Yuri.

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laviregev
Contributor I

Hi Yuri,

My name is Lavi Regev and I'm the programmer that works with Dan.

1. We didn't understand your answer, we didn't find any example in section 22.6

2. As far as we understand, even with the default configuration (without dealing with any register of the EIM) we should be able to read CS0 without any crash, but it is also doesn't work.

What do you suggest us to check?

Thanks, Lavi

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Yuri
NXP Employee
NXP Employee

Lavi, good day !

  As for the examples - some initialization is needed for EIM channels (CSx), except

the case, when EIM NOR flash is boot device ; here boot ROM provides (CS0) initialization.
But by default EIM channels are disabled (EIM_CSnGCR1[CSEN] = 0). 

Some examples from the Reference Manual are below.

22.7.1.1 Intel Sibley Flash Asynchronous Mode Configuration

• WR32('EIM_CS0GCR1,'h00210081);

• WR32('EIM_CS0RCR1,'h0e020000);

• WR32('EIM_CS0RCR2,'h00000000);

• WR32('EIM_CS0WCR1,'h0704a040);


22.7.1.2 Intel Sibley Flash Synchronous Mode Configuration

Configuration used for 133 MHz synchronous access to flash:

// Set memory to synchronous read mode

WR16('CS0+('h5903<<1),'h0060);

WR16('CS0+('h5903<<1),'h0003);

WR16('CS0+('h0000<<1),'h00ff);

// Set EIM configuration to synchronous timing

WR32('EIM_CS0GCR1,'h50214225); // 133 MHz

WR32('EIM_CS0RCR1,'h0c000000); // 12 cycles on memory

Configuration used for 66 MHz synchronous access to muxed flash:

// Set memory to synchronous read mode

WR16('CS0+('h3103<<1),'h0060);

WR16('CS0+('h3103<<1),'h0003);

WR16('CS0+('h0000<<1),'h00ff);

//--------------------------------------------------------------------------

// Set EIM configuration to synchronous timing

WR32('EIM_CS0GCR1,'h5021122d); // 66 MHz

WR32('EIM_CS0RCR1,'h07000000);

~Yuri.

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dank1
Contributor II

I have set the following registers for non-multiplexed asynchronous read and write:

EIM CS0:

--------

0x021b8000 0x00630081  -- EIM_CS0GCR1

0x021b8004 0x00001010  -- EIM_CS0GCR2

0x021b8008 0x0c002000  -- EIM_CS0RCR1

0x021b800C 0x00000000  -- EIM_CS0RCR2

0x021b8010 0x0c000000  -- EIM_CS0WCR1

0x021b8014 0x00000000  -- EIM_CS0WCR2

EIM CS1:

--------

0x021b8018 0x00630081  -- EIM_CS1GCR1

0x021b801C 0x00001010  -- EIM_CS1GCR2

0x021b8020 0x0c002000  -- EIM_CS1RCR1

0x021b8024 0x00000000  -- EIM_CS1RCR2

0x021b8028 0x0c000000  -- EIM_CS1WCR1

0x021b802C 0x00000000  -- EIM_CS1WCR2

EIM General Registers:

----------------------

0x021b8090,4 0x00000021  -- EIM_WCR

0x021b8094,4 0x00000010  -- EIM_WIAR

I have tried:

IOMUXC_GPR1:

-----------

0x020e0004 0x0000001b  -- Enable CS0 and CS1 each 64MB size

and

IOMUXC_GPR1:

-----------

0x020e0004 0x00000005  -- Enable CS0 128MB size


Both not working.

I do not get any tranaction on the EIM bus when reading address 0x08000000.


I also tried disabling CS1 and only leave CS0:

0x021b8018 0x00630080  -- EIM_CS1GCR1


Also didn't work.


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