Hi All,
I am interfacing only one DRAM Clock ( DRAM_SDCLK_0) from i.MX6 Dualite Processor to my system DDR3 Modules.
I don't want the second DRAM Clock (DRAM_SDCLK_1) cause any EMI issues. Hence I would like to know is it possible to disable the second channel Clock of MultiMode DDR Controller?
Best Regards,
KP
You may try to configure DSE (drive strength) field in IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK1_P as 000 HIZ (HI-Z).