CTS output strange behave in imx6ul RS485 Mode

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CTS output strange behave in imx6ul RS485 Mode

381 Views
changbaoma
Contributor III

Hello, NXP Experts

I have success to control  RS485 Transceiver's DE/_RE to send/receive data by using CTS as GPIO mode . See below:

&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
rts-gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>;
uart-has-rtscts;
linux,rs485-enabled-at-boot-time;
status = "okay";
};

pinctrl_uart4: uart4grp {
fsl,pins = <
MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
MX6UL_PAD_LCD_HSYNC__GPIO3_IO02 0x1b0b1                    /* CTS  pin as gpio*/
>;
};

And I noticed there is another way using CTS as UART Controller's CTS_B signal to directly controll RS485 Transceiver's DE/_RE. which also mentioned by @weidong_sun , he said

---UART_CTS

UART_CTS pin controls IO direction, which may have better performance than GPIO mode, but it also depends on software to determine when TX ends or RX ends. There is always a delay.

So now i testing using CTS as UART Controller's CTS_B signal to directly controll RS485 Transceiver's DE/_RE, and modify device tree to:

&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
rts-gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>;
uart-has-rtscts;
linux,rs485-enabled-at-boot-time;
status = "okay";
};

pinctrl_uart4: uart4grp {
fsl,pins = <
MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
MX6UL_PAD_LCD_HSYNC__GPIO3_IO02 0x1b0b1                    /* CTS  pin as gpio*/

MX6UL_PAD_LCD_HSYNC__UART4_DCE_CTS 0x1b0b1    /* dedicated CTS */>;

};

And now i got a strange behave on CTS output.

Below i let imx6ul send 5 byte date throught Uart4, i capture the CTS in Oscilloscope:

changbaoma_0-1637662931370.png

Strange Behave 1: why CTS held high before Tx datas?  (CTS  high means Tx in RS485 Transceiver)

Strange Behave 2: why CTS held high after Tx datas?  (CTS  high means Tx in RS485 Transceiver)

Strange Behave 3:  mybe correct.

 

Zoom in the first byte send:

changbaoma_1-1637663611184.png

Strange Behave 4:  why CTS held low a period before assert(set high) CTS to send data.

 

Any help are appreciated. Thank you in advance.

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7 Replies

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BiyongSUN
NXP Employee
NXP Employee

If you read the RS485 spec, you will find RS485 is "half-duplex" communication. 

only receive or transmit at one time. that is why need control the direction. 

The "before" and "after" is for "receiving".

If you read the i.MX6UL reference manual, you will find RS485 is "1 bit" differential bus.

BTW, data is the plural form of datum. no word "datas" in English. 

 

无标题.png

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changbaoma
Contributor III

Hello, SUN

 

Thanks for your quick reply.

My confusion is still.

 

--> The "before" and "after" is for "receiving".

I think "before" and "after" should be low to receive default.

changbaoma_0-1637671928288.png

 

-->  BTW, data is the plural form of datum. no word "datas" in English.

Please forgive my poor English.

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BiyongSUN
NXP Employee
NXP Employee

Yes.

That is your  waveform. 

CTS high has data on tx. 

Have you sent date to i.MX6UL?  and you should measure the waveform on RX pin of i.MX6UL.

 

changbaoma_1-1637663611184.png

 

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changbaoma
Contributor III

您好,SUN

感谢您的解答。

我理解您说的RS485信号为差分单工。

我Post里的图形均为imx6ul发送数据时的波形。(使用的是imx6的UART控制器的CTS功能来控制RS485的收发)

我怕我问题描述不清楚,这里重复一次。我的困惑为以下三点:

1. 在Tx发送数据前和Tx发完数据后,CTS为什么电平会为High(如我图一中的①和②)。

    我理解收发控制信号只有在TX真正发送数据时才可以是High,其它时间应该为Low。

2. 每个字节数据发送前为什么CTS会有一小段的拉低过程(如我图三中的④)。

3. 每个字节数据发送后为什么CTS会有一小段的拉低过程(如我图二中的③)。

 

FYI:

以下是我以GPIO mode方式使用imx6的CTS引脚来控制时的RS485的收发的波形:

changbaoma_0-1637713631768.png

你可以看到CTS默认是为低电平的,只有在Tx发送数据时(前)才拉高,发送完后又会回到低电平。

 

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BiyongSUN
NXP Employee
NXP Employee

suggest you can use 0x33 data to make the waveform easy to analyze.

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changbaoma
Contributor III

您好, @BiyongSUN 

 

我使用串口发送了一个字节0x5B(LSB为0XDA),波形如下:

changbaoma_0-1637828218451.png

(黄色为Tx,蓝色为CTS)

如上图Tx数据波形没有问题。

但是CTS我觉得有问题,如下图:

(下图CTS除了⑤是正常)

changbaoma_1-1637828501873.png

问题:

1. 在Tx发送数据前和Tx发完数据后,为什么CTS电平会为High?可否配置为低电平?(如上图的①和②)。

    因为RS485的收发控制信号DE/_RE输入为Low时才接收数据,如果CTS电平默认为High则一直无法接收收据。

2. 每个字节数据发送前为什么CTS会有一小段的拉低过程(如上图的③)。

3. 每个字节数据发送后为什么CTS会有一小段的拉低过程(如上图的④)

 

麻烦您详细解答。

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BiyongSUN
NXP Employee
NXP Employee

 

1. 确认一下用的BSP 的版本。主要是确认一下驱动。

2. 确认一下是用的标准的RS485 的编程。 

比方 是用的这些结构。 


struct serial_rs485 rs485conf;

memset(&rs485conf, 0, sizeof(rs485conf));

rs485conf.flags |= SER_RS485_ENABLED;
rs485conf.flags |= SER_RS485_RTS_ON_SEND;
rs485conf.flags &= ~(SER_RS485_RTS_AFTER_SEND);

 

3. 确定一下 dts 文件是按照binding guide 写的。 

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