CSI0_MCLK output fades out

[gennadiykiryukh]

I have trouble getting a stable clock output on CSI0_MCLK pin of imx6s .

When opening the device (I use cat /dev/video0 to test the signals) I expected a stable 24MHz clock. Instead I get a fading out clock with the amplitude looking like this:

At the beginning, the signal is looking like it supposed to, nice square wave. However it is quickly decaying and turning into a sign wave with small amplitude after 300 microseconds. The signal is routed to clock input pins of two image sensors. 1.8V power rail stays the same at 1.8V.

What could be causing the signal to behave like this?

Thank you.

[gennadiykiryukh]

Turns out the problem was with 1.8V NVCC_CSI power rail connection on the processor. Fixing it made the clock stable.

[igorpadykov]

Hi Gennady

one can try to tweak DSE,SPEED, SRE settings described in

sect.37.4.229 Pad Control Register i.MX6SDL Reference Manual
i.MX 6Solo/6DualLite Applications Processor Reference Manual 
AN5078 Influence of Pin Setting on System Function and Performance
Influence of Pin Setting on System Function and Performance

Best regards
igor
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