CSI->VDI on i.MX53 IPU

[LeonCraven]

Hi,

Has anyone actually managed to implement the "real time mode" of capturing a field from the CSI and sending it directly to the VDI, without double buffering the field in MEM first? An example flow would be CSI->VDI->>PRP_VF(IC)->MEM.

Freescale hasn't implemented any CSI->VDI flows. At the moment we are using CSI->MEM followed by MEM->VDI->PRP_VF(IC)->MEM, however this path adds too much latency. We don't care about tearing or other artifacts, our main concern is latency.

I've searched the Freescale forums (and used Google) but can't seem to find anyone that has managed to implement a CSI->VDI flow. I've also added a Service Request with Freescale, but I'm still waiting to hear back. My concern is that this flow isn't actually possible.

We are using Linux, but if someone has managed to implement a CSI->VDI flow in another OS, that would at least give me some confidence that it is actually possible.

Regards,

Leon Craven

[TomE]

Yes, we got this working from a simple user application.

The trick was to use USERPTR on one side and MMAP on the other. So the input goes directly into the output buffer. We have to copy the buffer structures, but not the buffer data. Frustratingly the drivers have no support for the "standard" way of doing this - they're incomplete.

			capture_buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
			capture_buf.memory = V4L2_MEMORY_MMAP;

			output_buf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
			output_buf.memory = V4L2_MEMORY_USERPTR;

Tom

[TomE]

"i.MX53 V4L2: Is De-Interlace in Overlay mode possible?"

https://community.freescale.com/message/567567

Tom

[InsideImx]

Hello,

I am looking for a baremetal implementation of VDI Real time mode and especially this flow :

RM :

38.4.11.4 Real Time Mode

In Real Time Mode the F(n-1) are coming from CSI. The CSI write to FIFO1. The DI sub-block read F(n-1) from processing. In addition IDMAC read the field from FIFO1 and store in external memory. Then stored frames are used as F(n) and F(n+1).

RM :

Capturing interlaced input and storing it in the memory (via VDIC) while performing video de-interlacing in the VDIC.

CSI0 or CSI1 -> VDIC --> MEM

Input : IDMAC_CH_9, IDMAC_CH_10

Output : IDMAC_CH_5, IDMAC_CH_13

Interlaced input coming from one of the CSIs is sent to the memory without processing via channel #13. In addition 2 more inputs are read from the memory via channels 9 and 10. The processed image is written to the memory via ch 5 in progressive scan mode.

Note in imx6 Platform_SDK, there is a implemenation of vdi direct path ("csi_vdi_direct_path = 1") but it do not requires used of channel 13 and 9,10 because full motion filter is used. We intend to use low motion algorithm.

Best regards,

[Yanfei_Sun · Accepted solution]

Hi Leon,

I add the support for real time processing of VDI in the new SDK(Platlib) release. the data flow is DVD(CVBS signals) -> TVDAC(output UYVY)->VDI->PrPVF(IC)->Memory, then rendering to display. if you are interested, please contact me and I can give you some bare-metal sample code for this feature.

BTW, the release of Platlib will be on Nov 12th, and you can download it from Freescale extranet. this feature will be included in this release. this will run for imx6, but it should be similar for mx53.

Thanks,

Ray

[donfreiling]

Could you please direct me to the bare-metal sample code for CSI->VDI mode. I am trying to implement real time VDI mode on imx6 with just CSI->VDI->MEM.

Thanks!