CPU frequency working point by i.MX6 Yocto BSP (L3.10.17_1.0.0-ga).

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CPU frequency working point by i.MX6 Yocto BSP (L3.10.17_1.0.0-ga).

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satoshishimoda
Senior Contributor I

Hi community,

I want to know how set cpu frequency working point by Yocto BSP.

Please see chapter 24.1.2 in i.MX 6 Linux Reference Manual (IMX6LXRM Rev.L3.10.17_1.0.0-ga).

It says "For CPU frequency working point settings, see arch/arm/mach-mx6/cpu_op-mx6.c", but there is no this file in Yocto BSP even thoug LTIB BSP (L3.0.35_4.1.0) has it.

Then, could you let me know how set cpu frequency working point by Yocto BSP instead of this file?

Best Regards,

Satoshi Shimoda

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fabio_estevam
NXP Employee
NXP Employee

For mx6q for example, take a look at arch/arm/boot/dts/imx6q.dtsi and search for "operating-points"

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1,059 次查看
fabio_estevam
NXP Employee
NXP Employee

For mx6q for example, take a look at arch/arm/boot/dts/imx6q.dtsi and search for "operating-points"

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satoshishimoda
Senior Contributor I

Hi Fabio Estevam,

Thank you for your quick reply.

OK, I understand what file we should modify.

By the way, this file has not only "operating-points" but also "fsl,soc-operating-points".

To add a new operating point, for example 198MHz, which code in following should we add to the file?

<operating-points>

/* kHz    uV */

198000 975000

<fsl,soc-operating-points>

/* ARM kHz  SOC-PU uV */

198000       1175000

Best Regards,

Satoshi Shimoda

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AnsonHuang
NXP Employee
NXP Employee

Hi, Satoshi

     I am not sure why you want to add new setpoint for cpufreq? As all the available setpoin listed in datasheet are now enabled in dts. BTW, only scaling down cpufreq but keep voltage same as before did NOT save any power, actually it may increase power consumption, as with same voltage, if cpufreq is higher, it can finish the task quicker and go into idle sooner.

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satoshishimoda
Senior Contributor I

Hi Yongcai Huang,

Thank you for your advice, but sorry I don't understand why lower cpu frequency cannot reduce power consumption if voltage is same.

Could you let me know the reason?

Is cpu clock gated in the ARM core when cpu is no load even if PLL1 outputs cpu clock?

Best Regards,

Satoshi Shimoda

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AnsonHuang
NXP Employee
NXP Employee

Yes, when CPU is idle and SOC enter WAIT mode, ARM clock will be gated even PLL1 outputs clock, and also, ARM platform will enter low power mode, that will save many power, so we should let SOC in WAIT mode as long as possible.