CMA memory region - how to determine upper limit address?

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CMA memory region - how to determine upper limit address?

Contributor IV


I'm working on a custom board based on the i.MX8M-Plus processor and EVK development kit.  I notice that the EVK comes with 6GB of RAM, and is configured to allocate a 960M CMA area based on the following kernel command line parameter (in Android-11.0.0_2.6.0 BSP):

BOARD_KERNEL_CMDLINE += cma=960M@0x400M-0x1000M

However, my custom board is configured for 4GB of RAM, and consuming almost 1GB of RAM for CMA area is quite a lot.  I know how to reduce the CMA area from 960M to something smaller (I'm trying 640M to start with), but I'm not sure how to calculate and specify the upper memory address.

For example, the upper memory address for the 1GB EVK config is specified as 0xb80M:

BOARD_KERNEL_CMDLINE += cma=320M@0x400M-0xb80M

Also, are there any recommendations on what to set the CMA area size to be for different RAM configurations? I've read the documentation but there wasn't any guidance other than "this is how you set it".

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Contributor IV

Hello nxf65025,

Thanks for the reply - I realize that the required CMA area can differ based on usage, and in fact we've determined by testing at 640M is the appropriate size for the CMA area based on our application.  However, my question is how do I determine the memory address constraint (ex: 0x400M-0x1000M) that is part of the CMA command line parameter?

For example: the 320M CMA configuration parameter for the EVK development kit with a "low ram" configuration is:


Therefore, the memory address constraint is 0x400M-0xb80M for this configuration.  In contrast, the 960M CMA configuration parameter is specified as:


Therefore, the memory address constraint is 0x400M-0x1000M for this configuration.

How do I determine the memory address constraint based on the specified CMA size?


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NXP TechSupport
NXP TechSupport


There is no specific ratio for the size of the CMA, it depends on your system usage. The 960MB cma size is based on the value when all display interfaces are connected and the VPU is used.



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