Bulk capacitor for i.MX6 VDDHIGH_CAP and NVCC_PLL_OUT.

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Bulk capacitor for i.MX6 VDDHIGH_CAP and NVCC_PLL_OUT.

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satoshishimoda
Senior Contributor I

Hi community,

I have a question about i.MX6DQ design.

Please see No.4 of Table 2-4 in IMX6DQ6SDLHDG Rev.1.

There is the following description there.

"Only one 10 uF bulk capacitor should be connected to each of these on-chip LDO regulator outputs:

• VDD_HIGH_CAP

• NVCC_PLL_OUT

• VDD_USB_CAP"

However, 22uF capacitor is used for VDDHIGH_CAP and NVCC_PLL_OUT in MCIMX6Q-SDP schematics (SPF-27392_C3.pdf).

And the above description is removed "HW Design Checking List for i.Mx6 Rev2.6.xlsx" in HW Design Checklist for i.MX6.

Which is correct?

Best Regards,

Satoshi Shimoda

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gusarambula
NXP TechSupport
NXP TechSupport

Regarding item 4 of Table 2-6, this recommendation was based on initial measurements. Decoupling capacitors (0.1uF, 0.22uF) do not count toward the bulk capacitor limitation of 10uF initially listed. The correct value should be up to 22uF after testing although both values would work fine as Jorge mentioned.

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gusarambula
NXP TechSupport
NXP TechSupport

Regarding item 4 of Table 2-6, this recommendation was based on initial measurements. Decoupling capacitors (0.1uF, 0.22uF) do not count toward the bulk capacitor limitation of 10uF initially listed. The correct value should be up to 22uF after testing although both values would work fine as Jorge mentioned.

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JorgeRama_rezRi
NXP Employee
NXP Employee

Hi Satoshi,

Both values (10uF and 22uF) work fine. I'd recommend to use 10uF as described in the users guide and as we use in the ARD board since this is the value design recommended and you may be able to find smaller caps. The HW design checklist rev 2.6 also recommends 10uF in row 3 of the Power and Decouple section.

Best regards.

Jorge.

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jamesbone
NXP TechSupport
NXP TechSupport

gusarambula Can you please take care?

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