Hi,
i am using the DDR Stress Tester to get calibration values for DDR3 RAM. I think I stumbled across a bug. Here is part of the messages from the tool:
BYTE 0:
Start: HC=0x00 ABS=0x00
End: HC=0x02 ABS=0x50
Mean: HC=0x01 ABS=0x28
End-0.5*tCK: HC=0x01 ABS=0x50
Final: HC=0x01 ABS=0x50
BYTE 1:
Start: HC=0x00 ABS=0x30
End: HC=0x02 ABS=0x58
Mean: HC=0x01 ABS=0x44
End-0.5*tCK: HC=0x01 ABS=0x58
Final: HC=0x01 ABS=0x58
DQS calibration MMDC0 MPDGCTRL0 = 0x41D80150, MPDGCTRL1 = 0x00000000
If I am not mistaken, shouldn't the last line be
DQS calibration MMDC0 MPDGCTRL0 = 0x41580150, MPDGCTRL1 = 0x00000000
Hello,
DG_EXT_UP (DG extend upper boundary) bit is set, meaning the upper
boundary is set according to the last passing comparison. This is more reliable
configuration.
Have a great day,
Yuri
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