Boot per uuu Tool not possible with 1800 MHz instead of 2000 MHz with LPDDR4

[NikJur]

Hello everybody,

i am using a IMX8MP with LPDDR4. The BSP version is 6.6.3.

Because of realiability reasons we need to lower the RAM-Frequency down to 1800 MHz instead of the standard 2000 MHz.

I do this via the RPA-Excelsheet or directly in the config Tool. The generated c-files are then used by our firmware developer to make a uboot which i then try to flash via the ""uuu"-Tool.

Everytime i deviate the frequency from 2000 MHz, the RAM stays in Reset mode. I measured this via an oscilloscope. The message from the uuu-Tool is an LIBUSB-ERROR and on the console i can see that the RAM doesnt even get into Training -> why i measured if the Resetsignal from the SOC is set correctly. 

If i use the ConfigTool v.15.1/v.16/mScale DDR Tool, i can connect to RAM, do all the Stresstests, eye diagrams, etc. successfully with <2000 MHz. 

I am now assuming that we miss a step when adjusting the working frequency in the firmware. 

Is it enough to ONLY change the frequency in the RPA/ConfigTool or do we need to adjust the firmware as well? What else can cause the RAM to not even start?/Why does the SOC not release the RAM from the Resetstate?

When i give parameters which are bad and fail Training i normally get this message, but again only for the standard 2000 MHz:

"U-Boot SPL 2023.04-00031-g1b0d4346b7-dirty (Jun 24 2024 - 14:47:
DDRINFO: start DRAM init
DDRINFO: DRAM rate 4000MTS
Training FAILED"

From the following link i see that in the case of a imx8mini the PLL-settings would need to be changed as well. For the imx8mp i cannot find such documentation:

iMX 8M Mini Register Programming Aid DRAM PLL setting - NXP Community

I also attach an example of the ConfigFile for the Windows-Stresstesttools, which are working fine, also under temperature fluctuations.

With best regards

Nikola

[NikJur]

@AldoG Yes, indeed i found the places in the Firmware where i needed to add the PLL-configuration:

Add your frequency and PLL-Parameters to File "clock_imx8mm.c" - "static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = {}"

Best regards

Nikola

[AldoG · Accepted solution]

Hello,

Even if stress test passed it is needed to update the DDR initial code generated by Config tool into uboot.

Also, changing PLL would be needed as well, as the same procedure should be aplicable for i.MX8MP as it is for i.MX8MM, this would be the reason that there is not specific documentation for it.

Best regards/Saludos,
Aldo.