Boot from MLC NAND (kobs-nd dump segmentation fault)

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Boot from MLC NAND (kobs-nd dump segmentation fault)

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sanjaydwivedi
Contributor I

I am using imx6 solo processor and trying to boot from micron MLC nand. I tried to write u-boot.imx image from kobs-ng.

I am not sure weather u-boot image is properly written in nand or not.

Can anyone help in finding the way to verify weather boot image written in nand is proper or not.

Also I need help in getting u-boot commands to initiate boot from nand.

Commandkobs-ng init -v -x u-boot.imx

LOG Message :

MTD CONFIG:

  chip_0_device_path = "/dev/mtd0"

  chip_1_device_path = "(null)"

  search_exponent = 2

  data_setup_time = 80

  data_hold_time = 60

  address_setup_time = 25

  data_sample_time = 6

  row_address_size = 3

  column_address_size = 2

  read_command_code1 = 0

  read_command_code2 = 48

  boot_stream_major_version = 1

  boot_stream_minor_version = 0

  boot_stream_sub_version = 0

  ncb_version = 3

  boot_stream_1_address = 0

  boot_stream_2_address = 0

u-boot.imx_solo: verifying using key '00000000000000000000000000000000'

u-boot.imx_solo: is a valid bootstream for key '00000000000000000000000000000000'

mtd: opening: "/dev/mtd0"

mtd: opened '/dev/mtd0' - '(null)'

mtd: max_boot_stream_size_in_bytes = 4194304

mtd: boot_stream_size_in_bytes = 425856

mtd: boot_stream_size_in_pages = 104

mtd: #1 0x00200000 - 0x00600000 (0x00267f80)

mtd: #2 0x00600000 - 0x00a00000 (0x00667f80)

FCB

  m_u32Checksum = 0

  m_u32FingerPrint = 541213510

  m_u32Version = 16777216

  m_NANDTiming.m_u8DataSetup = 80

  m_NANDTiming.m_u8DataHold = 60

  m_NANDTiming.m_u8AddressSetup = 25

  m_NANDTiming.m_u8DSAMPLE_TIME = 6

  m_u32PageDataSize = 4096

  m_u32TotalPageSize = 4320

  m_u32SectorsPerBlock = 256

  m_u32NumberOfNANDs = 0

  m_u32TotalInternalDie = 0

  m_u32CellType = 0

  m_u32EccBlockNEccType = 8

  m_u32EccBlock0Size = 512

  m_u32EccBlockNSize = 512

  m_u32EccBlock0EccType = 8

  m_u32MetadataBytes = 10

  m_u32NumEccBlocksPerPage = 7

  m_u32EccBlockNEccLevelSDK = 0

  m_u32EccBlock0SizeSDK = 0

  m_u32EccBlockNSizeSDK = 0

  m_u32EccBlock0EccLevelSDK = 0

  m_u32NumEccBlocksPerPageSDK = 0

  m_u32MetadataBytesSDK = 0

  m_u32EraseThreshold = 0

  m_u32Firmware1_startingPage = 512

  m_u32Firmware2_startingPage = 1536

  m_u32PagesInFirmware1 = 104

  m_u32PagesInFirmware2 = 104

  m_u32DBBTSearchAreaStartAddress = 256

  m_u32BadBlockMarkerByte = 3904

  m_u32BadBlockMarkerStartBit = 0

  m_u32BBMarkerPhysicalOffset = 4096

  m_u32BCHType = 0

  m_NANDTMTiming.m_u32TMTiming2_ReadLatency = 0

  m_NANDTMTiming.m_u32TMTiming2_PreambleDelay = 0

  m_NANDTMTiming.m_u32TMTiming2_CEDelay = 0

  m_NANDTMTiming.m_u32TMTiming2_PostambleDelay = 0

  m_NANDTMTiming.m_u32TMTiming2_CmdAddPause = 0

  m_NANDTMTiming.m_u32TMTiming2_DataPause = 0

  m_NANDTMTiming.m_u32TMSpeed = 0

  m_NANDTMTiming.m_u32TMTiming1_BusyTimeout = 0

  m_u32DISBBM = 0

DBBT

  m_u32Checksum = 0

  m_u32FingerPrint = 1413628484

  m_u32Version = 16777216

  m_u32DBBTNumOfPages = 0

Firmware: image #0 @ 0x200000 size 0x68000 - available 0x400000

Firmware: image #1 @ 0x600000 size 0x68000 - available 0x400000

-------------- Start to write the [ FCB ] -----

mtd: erasing @0:0x0-0x100000

mtd: Writing FCB0 [ @0:0x0 ] (10e0) *

mtd: Writing FCB1 [ @0:0x40000 ] (10e0) *

mtd: Writing FCB2 [ @0:0x80000 ] (10e0) *

mtd: Writing FCB3 [ @0:0xc0000 ] (10e0) *

mtd_commit_bcb(FCB): status 0

-------------- Start to write the [ DBBT ] -----

mtd: erasing @0:0x100000-0x200000

mtd: Writing DBBT0 [ @0:0x100000 ] (1000) *

mtd: Writing DBBT1 [ @0:0x140000 ] (1000) *

mtd: Writing DBBT2 [ @0:0x180000 ] (1000) *

mtd: Writing DBBT3 [ @0:0x1c0000 ] (1000) *

mtd_commit_bcb(DBBT): status 0

---------- Start to write the [ u-boot.imx_solo ]----

mtd: Writting u-boot.imx_solo: #0 @0: 0x00200000 - 0x00268000

mtd: erasing @0:0x200000-0x300000

mtd: The last page is not full : 3968

mtd: We write one page for save guard. *

mtd: Writting u-boot.imx_solo: #1 @0: 0x00600000 - 0x00668000

mtd: erasing @0:0x600000-0x700000

mtd: The last page is not full : 3968

mtd: We write one page for save guard. *

COMMAND : kobs-ng dump -v u-boot.imx_solo 

MTD CONFIG:

  chip_0_device_path = "/dev/mtd0"

  chip_1_device_path = "(null)"

  search_exponent = 2

  data_setup_time = 80

  data_hold_time = 60

  address_setup_time = 25

  data_sample_time = 6

  row_address_size = 3

  column_address_size = 2

  read_command_code1 = 0

  read_command_code2 = 48

  boot_stream_major_version = 1

  boot_stream_minor_version = 0

  boot_stream_sub_version = 0

  ncb_version = 3

  boot_stream_1_address = 0

  boot_stream_2_address = 0

mtd: opening: "/dev/mtd0"

mtd: opened '/dev/mtd0' - '(null)'

mtd: partition #0

  type = 8

  flags = 1024

  size = 10485760

  erasesize = 1048576

  writesize = 4096

  oobsize = 224

  blocks = 10

Segmentation fault

U-boot command used :

                                                       mw.l 0x20d8040 0x1683

                                                       mw.l 0x20d8044 0x10000000

         

                                                        reset

But it is not getting booted.

Reference Used : Freescale Yocto i.MX6 U-Boot NAND Boot

                                  

Thanks in advance

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi sanjay

had you added in image support for this new NAND to

drivers/mtd/nand/nand_ids.c

drivers/mtd/nand/nand_device_info.c   ?

kobs-ng uses info in these files while writing to NAND.

Also recommended way to use MFG Tool (Sabre AI profile has

script for NAND writing)

IMX_6_MFG_L3.10.17_1.0.0_TOOL : i.MX 6Family Manufacturing Toolkit for L3.10.17.

Actually for testing you can try with older ltib release

IMX_6DL_6S_MFG_TOOL : Tool and documentation for downloading OS images to the i.MX 6DualLite and i.MX6Solo.

Best regards

igor

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sanjaydwivedi
Contributor I

Hi Igor

Thanks for your reply.

I am using micron NAND flash and it is getting detected by kernel. Nand device is working fine so, I don't think there is any need of adding support in nand_ids.c.

I am having a doubt :

          How can we set the bootable device as nand?

          I am using command in u-boot cmd prompt:

                                                        mw.l 0x20d8040 0x1683

                                                        mw.l 0x20d8044 0x10000000

                                                        reset

Is it correct for imx6_solo.

Regards

Sanjay

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Sanjay

how is implemented WDOG reset on your board ?

Does it also toggle PMIC PWRON as in p.21 SPF-27392.

This is recommended reset circuit and with it anything, which you wrote

in Uboot to GPR9,10 will be reset to 0. Boot will be performed using boot pins

or from fuses as described in Chapter 8 System Boot IMX6SDLRM

Best regards

igor

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sanjaydwivedi
Contributor I

Hi Igor,

We tried with SPI NOR Flash and device is booting.

I am not sure about WDOG reset on board. But to boot from SPI NOR, we need to configure GPR 9 and 10.

Also I am not sure about PMIC POWERON toggle circuitry.

Regards

Sanjay

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Sanjay

could you point to documents which

described usage GPR 9 and 10 while booting

from SPI NOR ?

Best regards

igor

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sanjaydwivedi
Contributor I

Hi Igor

"After reset, if GPR10[28] is 1, ROM will copy GPR9[25:0] to SBMR1, which will determine the boot device."

I got this statement about software reset from link :

http://lists.denx.de/pipermail/u-boot/2012-May/125283.html

command I am using for booting from SPI NOR :

                                   mw.l 0x20d8040 0x18000030

                                   mw.l 0x20d8044 0x10000000

                                   reset


Regards

Sanjay

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Sanjay

you can boot from NAND then read SBMR1,

after that try use this value with uboot mw..reset commands

Best regards

igor

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198 Views
sanjaydwivedi
Contributor I

Hi Igor,

I am not able to beet from NAND. How can I proceed further?

I tried with MFG tool also.

MFG is not able to write u-boot image into the nand.

I cross checked the image written in NAND using kobs-ng and it seems to be placed in correct address with 1K of padding.

FCB and DBBT is also placed at desired address.

As 1st 2MB is reserved for FCB and and DBBT so u-boot starts from 2MB+1k address.

NAND Description :

Manufacturer ID: 0x2c, Chip ID: 0x68

Micron MT29F32G08CBACAWP

4096MiB, MLC, page size: 4096, OOB size: 224


Regards

Sanjay

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Sanjay

you can check SBMR1 with jtag.

Best regards

igor

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