Blocked JTAG access to i.Mx6 SoloX

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Blocked JTAG access to i.Mx6 SoloX

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PavelM
NXP Employee
NXP Employee

martinolejar-b47379

Customer cannot access to device via JTAG. UBoot is alive. Report from fuses:

=> fuse read 0 0 8
Reading bank 0:

Word 0x00000000: 20820002 df669959 220559d4 010000b4
Word 0x00000004: 00400002 00000000 00000000 00000000
=> fuse read 1 0 8
Reading bank 1:

Word 0x00000000: 000000c0 00000000 00000034 00000000
Word 0x00000004: 00000000 00000000 5b54f57d 00000000

 

OCOTP_CFGx register list:.

=> md.l 0x021bc410 28
021bc410: df669959 df669959 df669959 df669959    Y.f.Y.f.Y.f.Y.f.
021bc420: 220559d4 220559d4 220559d4 220559d4    .Y.".Y.".Y.".Y."
021bc430: 010000b4 010000b4 010000b4 010000b4    ................
021bc440: 00400002 00400002 00400002 00400002    ..@...@...@...@.
021bc450: 00000000 00000000 00000000 00000000    ................
021bc460: 00000000 00000000 00000000 00000000    ................
021bc470: 00000000 00000000 00000000 00000000    ................
021bc480: 000000c0 000000c0 000000c0 000000c0    ................
021bc490: 00000000 00000000 00000000 00000000    ................
021bc4a0: 00000034 00000034 00000034 00000034    4...4...4...4...

Howto change fuses settings?

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martinolejar-b4
NXP Employee
NXP Employee

Hello Petr,

I attache here the table which Yuri mention and which describe all dependencies for JTAG:

pastedImage_4.png

eFuses must be correct, if you don't touch it. 

Can you put here the schematic? Thanks

Martin

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kubiznak_petr
Contributor V

Hi Martin,

Thank you for nice summarization. The problem is not in the fuses, as we found out in the meantime. IAR support finally helped us identify the issue:

It seems to be a NXP/Freescale mistake in iMX6 eval boards to attach nTRST to a pin that is defined as GNDDetect (pin #9) on MIPI20/10 connector. Problems caused by custom boards repeating this mistake have surfaced at irregular intervals since January 2014. Pin #9 "GNDDetect" is intended to allow disabling on-board emulator when an external probe is connected.

So it seems the only problem is in the JTAG_TRST_B signal connected to pin #9 of the JTAG connector (see schematics below). This is inspired by the SabreSDB reference design. Can you please comment why it is connected like that?

jtag_sch.png

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martinolejar-b4
NXP Employee
NXP Employee

Hi Petr,

Here is the recommended connection of 10 Pin JTAG connector from i.MX7D SabreSD Board:

pastedImage_1.png

The i.MX6SX SabreSD board is using 20 Pin header for JTAG connector and there is a place for TRST signal (Pin3) but 10 Pin header haven't it.

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kubiznak_petr
Contributor V

PavelM‌ described our issue but did not actually pose the right question, so let me correct it. We cannot access the i.MX6 SoloX's JTAG interface from IAR, neither with SEGGER j-Link, nor with IAR I-jet. We get the following log in IAR:

Loaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 7.4\arm\config\debugger\NXP\iMX6SX.dmac
Loaded macro file: C:\Projects\arm\7.60.1\NXP\MX6\MCIMX6SX_SDB\GettingStarted\config\mcimx6sx.mac
Loading the I-jet/JTAGjet driver
Probe: Probe SW module ver 1.54
Probe: Option: trace(Auto,size_limit=8M)
Probe: I-jet-Trace SW module ver 1.61
Probe: Found I-jet, SN=81745
Probe: Opened connection to I-jet:81745
Probe: USB connection verified (393 packets/sec)
Probe: I-jet, FW ver 4.2, HW Ver:A
Probe: None or IJET-MIPI10 adapter detected
Probe: Versions: JTAG=1.73 SWO=1.36 A2D=1.68 Stream=1.46 SigCom=2.41
EARM v.3.99
Emulation layer version 3.99
Warning: JTAG clock cannot be automatically determined. Set the clock manually.
         A default 9.6MHz is used.
Notification to init-after-power-up hookup.
Notification to core-connect hookup.
CPU status FAILED
LowLevelReset(hardware, delay 200)
Fatal error: CPU did not power up   Session aborted!
Loading the I-jet/JTAGjet driver

The processor resets, but the connection is not established after that. The device is powered externally, so the fatal error at the end of the log is not really suitable.

There is an opinion that the problem might be in the fuses. I do know how to blow them, but I don't want to do it unless we are really sure the problem is there. Actually, I checked corresponding chapters in the RM and have feeling that the fuses are set correctly (i.e. remain unblown). We were suspecting the SJC_DISABLE and JTAG_SMODE fuses, but as the u-boot log shows, they are all zeros, which should mean JTAG is fully enabled and non-secured.

021bc460: 00000000

So the question is not how to blow the fuses, but whether the listed fuses values are correct, and whether there are some other crucial settings impacting the JTAG functionality.

The device is set to boot in the Internal Boot mode.

 YuriMuhin_ng‌, is your link applicable to IAR? It doesn't seem so.

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Yuri
NXP TechSupport
NXP TechSupport

Hello,

   By default JTAG of i.MX6SX is enabled (regarding fuse configuration).

The issue may take place if internal i.MX6 JTAG chain is not configured correctly,

therefore I provided (last time) an example. You may try to adapt it just for Your debugger
or apply to manufacturer.  

Regards,

Yuri.

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kubiznak_petr
Contributor V

Hi Yuri,

IAR works fine with the Sabre SDB board. Does JTAG chain differ between boards of the same platform?

(Note I'm not a specialist on JTAG, please be specific on what to do and how.)

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Yuri
NXP TechSupport
NXP TechSupport

Hi,

Does JTAG chain differ between boards of the same platform? 

Yes.

~Yuri.

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Yuri
NXP TechSupport
NXP TechSupport

Hello,

  As for JTAG, You may look at the following

https://community.nxp.com/docs/DOC-106198 

You may apply U-boot command "fuse write", if needed.

Regards,

Yuri.

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